From patchwork Tue Oct 7 19:11:11 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Paulo Zanoni X-Patchwork-Id: 5048471 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id A4B2B9F295 for ; Tue, 7 Oct 2014 19:11:41 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id EBDDD2018E for ; Tue, 7 Oct 2014 19:11:40 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 2ACFE2017D for ; Tue, 7 Oct 2014 19:11:40 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 8589189E46; Tue, 7 Oct 2014 12:11:39 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail-qc0-f172.google.com (mail-qc0-f172.google.com [209.85.216.172]) by gabe.freedesktop.org (Postfix) with ESMTP id 2588889E46 for ; Tue, 7 Oct 2014 12:11:39 -0700 (PDT) Received: by mail-qc0-f172.google.com with SMTP id o8so6483010qcw.3 for ; Tue, 07 Oct 2014 12:11:38 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=nExmBldOhDvrusYHxUP2rlnRu+deR+kXpoSW7JSgUfk=; b=IwH6LC5i5GqBRY5QrM9AWSCQ9QAYkJCo34Ec1jZ/awscXPtBJIoPDwwmUAatLkKBj/ RLSo06pQR9XybpEw4JZ+I8NB1umfwMXKQ0RIeM30DeuphcEp25hTQHU2zLnKz4pSEe66 AL7phS8ZtHxZnOzVfHZ6AaAFnBIlLcziEKokfBr1h7PpnraL+Hsaf9bRg58RR6rJk+Sf Kp9ZyvgwUWdCAFKre4uZNxbcqp2Mjj4mk/8ypFYkAyN6X1qiNJYb4hWfR2VuP5qXvznv Fmssw9OqVN1a454msD+lq7lLzJrXjbOevm0QZTMdK1F8SLBFK1Uk+n4zM5fhJz4YwDmT 3EtA== X-Received: by 10.140.105.195 with SMTP id c61mr38846936qgf.15.1412709098717; Tue, 07 Oct 2014 12:11:38 -0700 (PDT) Received: from localhost.localdomain ([177.40.35.66]) by mx.google.com with ESMTPSA id 33sm15357694qgy.30.2014.10.07.12.11.37 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 07 Oct 2014 12:11:38 -0700 (PDT) From: Paulo Zanoni To: intel-gfx@lists.freedesktop.org Date: Tue, 7 Oct 2014 16:11:11 -0300 Message-Id: <1412709071-1886-2-git-send-email-przanoni@gmail.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1412709071-1886-1-git-send-email-przanoni@gmail.com> References: <1412709071-1886-1-git-send-email-przanoni@gmail.com> Cc: Paulo Zanoni Subject: [Intel-gfx] [PATCH 2/2] drm/i915: only run hsw_power_well_post_enable when really needed X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-4.1 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_MED, T_DKIM_INVALID, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Paulo Zanoni Only run it after we actually enable the power well. When we're booting the machine there are cases where we run hsw_power_well_post_enable without really needing, and even though this is not causing any real bugs, it is unneeded and causes confusion to people debugging interrupts. Signed-off-by: Paulo Zanoni Reviewed-by: Ville Syrjälä --- drivers/gpu/drm/i915/intel_runtime_pm.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c index 36749b9..39c33e0 100644 --- a/drivers/gpu/drm/i915/intel_runtime_pm.c +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c @@ -221,9 +221,9 @@ static void hsw_set_power_well(struct drm_i915_private *dev_priv, if (wait_for((I915_READ(HSW_PWR_WELL_DRIVER) & HSW_PWR_WELL_STATE_ENABLED), 20)) DRM_ERROR("Timeout enabling power well\n"); + hsw_power_well_post_enable(dev_priv); } - hsw_power_well_post_enable(dev_priv); } else { if (enable_requested) { I915_WRITE(HSW_PWR_WELL_DRIVER, 0);