From patchwork Fri Oct 24 15:30:52 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniele Ceraolo Spurio X-Patchwork-Id: 5149981 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 058D9C11AC for ; Fri, 24 Oct 2014 21:30:25 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 2EC06201C7 for ; Fri, 24 Oct 2014 21:30:24 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 3724A20265 for ; Fri, 24 Oct 2014 21:30:23 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id EE16B6EBB9; Fri, 24 Oct 2014 14:25:18 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by gabe.freedesktop.org (Postfix) with ESMTP id 050FE6E087 for ; Fri, 24 Oct 2014 08:31:16 -0700 (PDT) Received: from orsmga001.jf.intel.com ([10.7.209.18]) by orsmga102.jf.intel.com with ESMTP; 24 Oct 2014 08:30:04 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.04,780,1406617200"; d="scan'208";a="595322683" Received: from dceraolo-linux.isw.intel.com ([10.102.226.62]) by orsmga001.jf.intel.com with ESMTP; 24 Oct 2014 08:31:06 -0700 From: daniele.ceraolospurio@intel.com To: intel-gfx@lists.freedesktop.org Date: Fri, 24 Oct 2014 16:30:52 +0100 Message-Id: <1414164652-24281-1-git-send-email-daniele.ceraolospurio@intel.com> X-Mailer: git-send-email 1.8.5.2 In-Reply-To: <1413984525-8963-1-git-send-email-daniele.ceraolospurio@intel.com> References: <1413984525-8963-1-git-send-email-daniele.ceraolospurio@intel.com> Subject: [Intel-gfx] [PATCH v5] drm/i915: Add ppgtt create/release trace points X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-5.6 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Daniele Ceraolo Spurio These tracepoints are useful for observing the creation and destruction of Full PPGTTs. v4: add DOC information v5: pull the DOC in drm.tmpl Signed-off-by: Daniele Ceraolo Spurio --- Documentation/DocBook/drm.tmpl | 13 ++++++++++ drivers/gpu/drm/i915/i915_gem_gtt.c | 4 +++ drivers/gpu/drm/i915/i915_trace.h | 50 +++++++++++++++++++++++++++++++++++++ 3 files changed, 67 insertions(+) diff --git a/Documentation/DocBook/drm.tmpl b/Documentation/DocBook/drm.tmpl index f6a9d7b..a372f52 100644 --- a/Documentation/DocBook/drm.tmpl +++ b/Documentation/DocBook/drm.tmpl @@ -3963,6 +3963,19 @@ int num_ioctls; !Idrivers/gpu/drm/i915/intel_lrc.c + + + Tracing + + This sections covers all things related to the tracepoints implemented in + the i915 driver. + + + i915_ppgtt_create and i915_ppgtt_release +!Pdrivers/gpu/drm/i915/i915_trace.h i915_ppgtt_create and i915_ppgtt_release tracepoints + + + !Cdrivers/gpu/drm/i915/i915_irq.c diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c index e0bcba0..ed9ec67 100644 --- a/drivers/gpu/drm/i915/i915_gem_gtt.c +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c @@ -1174,6 +1174,8 @@ i915_ppgtt_create(struct drm_device *dev, struct drm_i915_file_private *fpriv) ppgtt->file_priv = fpriv; + trace_i915_ppgtt_create(&ppgtt->base); + return ppgtt; } @@ -1182,6 +1184,8 @@ void i915_ppgtt_release(struct kref *kref) struct i915_hw_ppgtt *ppgtt = container_of(kref, struct i915_hw_ppgtt, ref); + trace_i915_ppgtt_release(&ppgtt->base); + /* vmas should already be unbound */ WARN_ON(!list_empty(&ppgtt->base.active_list)); WARN_ON(!list_empty(&ppgtt->base.inactive_list)); diff --git a/drivers/gpu/drm/i915/i915_trace.h b/drivers/gpu/drm/i915/i915_trace.h index f5aa006..525be1b 100644 --- a/drivers/gpu/drm/i915/i915_trace.h +++ b/drivers/gpu/drm/i915/i915_trace.h @@ -587,6 +587,56 @@ TRACE_EVENT(intel_gpu_freq_change, TP_printk("new_freq=%u", __entry->freq) ); +/** + * DOC: i915_ppgtt_create and i915_ppgtt_release tracepoints + * + * With full ppgtt enabled each process using drm will allocate at least one + * translation table. With these traces it is possible to keep track of the + * allocation and of the lifetime of the tables; this can be used during + * testing/debug to verify that we are not leaking ppgtts. + * These traces identify the ppgtt through the vm pointer, which is also printed + * by the i915_vma_bind and i915_vma_unbind tracepoints. + */ +TRACE_EVENT(i915_ppgtt_create, + TP_PROTO(struct i915_address_space *vm), + + TP_ARGS(vm), + + TP_STRUCT__entry( + __field(struct i915_address_space *, vm) + __field(u32, dev) + __field(int, pid) + ), + + TP_fast_assign( + __entry->vm = vm; + __entry->dev = vm->dev->primary->index; + __entry->pid = (int)task_pid_nr(current); + ), + + TP_printk("dev=%u, task_pid=%d, vm=%p", + __entry->dev, __entry->pid, __entry->vm) +); + +TRACE_EVENT(i915_ppgtt_release, + + TP_PROTO(struct i915_address_space *vm), + + TP_ARGS(vm), + + TP_STRUCT__entry( + __field(struct i915_address_space *, vm) + __field(u32, dev) + ), + + TP_fast_assign( + __entry->vm = vm; + __entry->dev = vm->dev->primary->index; + ), + + TP_printk("dev=%u, vm=%p", __entry->dev, __entry->vm) +); + #endif /* _I915_TRACE_H_ */ /* This part must be outside protection */