| Message ID | 1414192274-15933-1-git-send-email-damien.lespiau@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Sat, Oct 25, 2014 at 12:11:11AM +0100, Damien Lespiau wrote: > use_mmio_flip() makes sure we only enable MMIO flips on gen5+. So we > don't need to take into account older devices. Honestly, I prefer to keep the gen test here (around touching gen specifc portions of common registers). It stops it later biting back if we relax mmioflip to run on older gen. -Chris
On Sat, Oct 25, 2014 at 10:01:12AM +0100, Chris Wilson wrote: > On Sat, Oct 25, 2014 at 12:11:11AM +0100, Damien Lespiau wrote: > > use_mmio_flip() makes sure we only enable MMIO flips on gen5+. So we > > don't need to take into account older devices. > > Honestly, I prefer to keep the gen test here (around touching gen > specifc portions of common registers). It stops it later biting > back if we relax mmioflip to run on older gen. On the other hand, DSPSURF is gen4+. Ok, might as put a comment in there that it is gen4+ specific and remove the check. -Chris
On Sat, Oct 25, 2014 at 12:11:11AM +0100, Damien Lespiau wrote: > use_mmio_flip() makes sure we only enable MMIO flips on gen5+. So we > don't need to take into account older devices. Since the series accomplishes everything I just whined about in the first patch, I guess I have to: Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> -Chris
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 7d891e5..5133ef9 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -9567,12 +9567,11 @@ static void intel_do_mmio_flip(struct intel_crtc *intel_crtc) reg = DSPCNTR(intel_crtc->plane); dspcntr = I915_READ(reg); - if (INTEL_INFO(dev)->gen >= 4) { - if (obj->tiling_mode != I915_TILING_NONE) - dspcntr |= DISPPLANE_TILED; - else - dspcntr &= ~DISPPLANE_TILED; - } + if (obj->tiling_mode != I915_TILING_NONE) + dspcntr |= DISPPLANE_TILED; + else + dspcntr &= ~DISPPLANE_TILED; + I915_WRITE(reg, dspcntr); I915_WRITE(DSPSURF(intel_crtc->plane),
use_mmio_flip() makes sure we only enable MMIO flips on gen5+. So we don't need to take into account older devices. Signed-off-by: Damien Lespiau <damien.lespiau@intel.com> --- drivers/gpu/drm/i915/intel_display.c | 11 +++++------ 1 file changed, 5 insertions(+), 6 deletions(-)