From patchwork Wed Oct 29 17:22:41 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Lespiau, Damien" X-Patchwork-Id: 5189661 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 8FECC9F318 for ; Wed, 29 Oct 2014 17:23:27 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 8BCA62024F for ; Wed, 29 Oct 2014 17:23:26 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 9D16C2024D for ; Wed, 29 Oct 2014 17:23:25 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 0C9816E809; Wed, 29 Oct 2014 10:23:25 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by gabe.freedesktop.org (Postfix) with ESMTP id 9FDDB6E5E3 for ; Wed, 29 Oct 2014 10:23:23 -0700 (PDT) Received: from orsmga002.jf.intel.com ([10.7.209.21]) by orsmga101.jf.intel.com with ESMTP; 29 Oct 2014 10:22:51 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.07,278,1413270000"; d="scan'208";a="627773339" Received: from gfois-mobl2.ger.corp.intel.com (HELO strange.ger.corp.intel.com) ([10.252.16.46]) by orsmga002.jf.intel.com with ESMTP; 29 Oct 2014 10:22:49 -0700 From: Damien Lespiau To: intel-gfx@lists.freedesktop.org Date: Wed, 29 Oct 2014 17:22:41 +0000 Message-Id: <1414603367-24964-3-git-send-email-damien.lespiau@intel.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1414603367-24964-1-git-send-email-damien.lespiau@intel.com> References: <1414603367-24964-1-git-send-email-damien.lespiau@intel.com> Subject: [Intel-gfx] [PATCH 2/8] drm/i915: Use a common function for computing the fb height alignment X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-4.8 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP If we need to change the fb height constraints, it sounds like a good idea to have to do it in one place only. Signed-off-by: Damien Lespiau --- drivers/gpu/drm/i915/intel_display.c | 19 +++++++++++-------- drivers/gpu/drm/i915/intel_drv.h | 2 ++ drivers/gpu/drm/i915/intel_fbdev.c | 3 ++- 3 files changed, 15 insertions(+), 9 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 34672e8..2a84e47 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -2167,11 +2167,12 @@ static bool need_vtd_wa(struct drm_device *dev) return false; } -static int intel_align_height(struct drm_device *dev, int height, bool tiled) +int +intel_fb_align_height(struct drm_device *dev, int height, unsigned int tiling) { int tile_height; - tile_height = tiled ? (IS_GEN2(dev) ? 16 : 8) : 1; + tile_height = tiling ? (IS_GEN2(dev) ? 16 : 8) : 1; return ALIGN(height, tile_height); } @@ -6495,8 +6496,9 @@ static void i9xx_get_plane_config(struct intel_crtc *crtc, val = I915_READ(DSPSTRIDE(pipe)); crtc->base.primary->fb->pitches[0] = val & 0xffffffc0; - aligned_height = intel_align_height(dev, crtc->base.primary->fb->height, - plane_config->tiling); + aligned_height = intel_fb_align_height(dev, + crtc->base.primary->fb->height, + plane_config->tiling); plane_config->size = PAGE_ALIGN(crtc->base.primary->fb->pitches[0] * aligned_height); @@ -7527,8 +7529,9 @@ static void ironlake_get_plane_config(struct intel_crtc *crtc, val = I915_READ(DSPSTRIDE(pipe)); crtc->base.primary->fb->pitches[0] = val & 0xffffffc0; - aligned_height = intel_align_height(dev, crtc->base.primary->fb->height, - plane_config->tiling); + aligned_height = intel_fb_align_height(dev, + crtc->base.primary->fb->height, + plane_config->tiling); plane_config->size = PAGE_ALIGN(crtc->base.primary->fb->pitches[0] * aligned_height); @@ -12277,8 +12280,8 @@ static int intel_framebuffer_init(struct drm_device *dev, if (mode_cmd->offsets[0] != 0) return -EINVAL; - aligned_height = intel_align_height(dev, mode_cmd->height, - obj->tiling_mode); + aligned_height = intel_fb_align_height(dev, mode_cmd->height, + obj->tiling_mode); /* FIXME drm helper for size checks (especially planar formats)? */ if (obj->base.size < aligned_height * mode_cmd->pitches[0]) return -EINVAL; diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h index cb431db..e8235ae 100644 --- a/drivers/gpu/drm/i915/intel_drv.h +++ b/drivers/gpu/drm/i915/intel_drv.h @@ -848,6 +848,8 @@ void intel_frontbuffer_flip(struct drm_device *dev, intel_frontbuffer_flush(dev, frontbuffer_bits); } +int intel_fb_align_height(struct drm_device *dev, int height, + unsigned int tiling); void intel_fb_obj_flush(struct drm_i915_gem_object *obj, bool retire); diff --git a/drivers/gpu/drm/i915/intel_fbdev.c b/drivers/gpu/drm/i915/intel_fbdev.c index 1805012..66cde1e 100644 --- a/drivers/gpu/drm/i915/intel_fbdev.c +++ b/drivers/gpu/drm/i915/intel_fbdev.c @@ -575,7 +575,8 @@ static bool intel_fbdev_init_bios(struct drm_device *dev, } cur_size = intel_crtc->config.adjusted_mode.crtc_vdisplay; - cur_size = ALIGN(cur_size, plane_config->tiling ? (IS_GEN2(dev) ? 16 : 8) : 1); + cur_size = intel_fb_align_height(dev, cur_size, + plane_config->tiling); cur_size *= fb->base.pitches[0]; DRM_DEBUG_KMS("pipe %c area: %dx%d, bpp: %d, size: %d\n", pipe_name(intel_crtc->pipe),