diff mbox

[2/2] drm/i915: Keep min freq above floor on HSW/BDW

Message ID 1415237495-89576-3-git-send-email-Tom.O'Rourke@intel.com (mailing list archive)
State New, archived
Headers show

Commit Message

Tom.O'Rourke@intel.com Nov. 6, 2014, 1:31 a.m. UTC
From: Tom O'Rourke <Tom.O'Rourke@intel.com>

Set the min_freq_softlimit to max(RPe, 450MHz).

Setting a floor can ensure a minimum experience
level.  The 450MHz value came from a power and
performance study of various types of workloads
(3D, Media, GPGPU, idle, etc).

Signed-off-by: Tom O'Rourke <Tom.O'Rourke@intel.com>
---
 drivers/gpu/drm/i915/intel_pm.c |    6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)
diff mbox

Patch

diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index e4347d9..1244ff8 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -4779,7 +4779,8 @@  static void gen8_enable_rps(struct drm_device *dev)
 
 	if (IS_BROADWELL(dev)) {
 		hsw_use_efficient_freq(dev_priv);
-		dev_priv->rps.min_freq_softlimit = dev_priv->rps.efficient_freq;
+		dev_priv->rps.min_freq_softlimit =
+			max(dev_priv->rps.efficient_freq, (u8) 9); /* 450 MHz */
 	}
 
 	/* 2b: Program RC6 thresholds.*/
@@ -4879,7 +4880,8 @@  static void gen6_enable_rps(struct drm_device *dev)
 
 	if (IS_HASWELL(dev)) {
 		hsw_use_efficient_freq(dev_priv);
-		dev_priv->rps.min_freq_softlimit = dev_priv->rps.efficient_freq;
+		dev_priv->rps.min_freq_softlimit =
+			max(dev_priv->rps.efficient_freq, (u8) 9); /* 450 MHz */
 	}
 
 	/* disable the counters and set deterministic thresholds */