From patchwork Tue Nov 18 21:12:29 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jesse Barnes X-Patchwork-Id: 5333341 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 468BB9F2ED for ; Tue, 18 Nov 2014 21:12:43 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 65E2C201CD for ; Tue, 18 Nov 2014 21:12:42 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 54E0E201BC for ; Tue, 18 Nov 2014 21:12:41 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 708556E00B; Tue, 18 Nov 2014 13:12:40 -0800 (PST) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail-pd0-f178.google.com (mail-pd0-f178.google.com [209.85.192.178]) by gabe.freedesktop.org (Postfix) with ESMTP id 138106E00B for ; Tue, 18 Nov 2014 13:12:39 -0800 (PST) Received: by mail-pd0-f178.google.com with SMTP id y13so9012061pdi.37 for ; Tue, 18 Nov 2014 13:12:39 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=from:to:cc:subject:date:message-id; bh=V5yR+8W44J6Us7HZ4xYOL+1hGHlcFMkx+f1WU16MYfk=; b=k1IpM2bmMWShnvUBnNg2YbHsx7RzJUPjq8ftNCE/teyjt5JCgo6w25uVXCxrNFPbty zMS5oGBJFsslv7itDzTb7AwC7lr4d857K6KNRuY0IlhU4Yo3RxGnP8+fzPTlsoAEDyvr xl+ri7kO1nYzwZ4USxR5rgHwr1fjplq0FjoLvvafSfDPeWaLuKKVLhhxgEMrw94vUbex O/PrJ8Ezfir/11oPwLe2TRw3IvBca5HM0yjp050HwFdiiAL7dj+ZD53aCDf6PbgJpIIh LSEkn5Po0kmd1IY2g8OmSA8pTktXNzjlHL0qXEz1V9Nb60aVOPNRcK9PXBlmdS/85R1S NOZw== X-Received: by 10.66.66.234 with SMTP id i10mr40010217pat.44.1416345158926; Tue, 18 Nov 2014 13:12:38 -0800 (PST) Received: from jbarnes-t420.intel.com (c-67-161-37-189.hsd1.ca.comcast.net. [67.161.37.189]) by mx.google.com with ESMTPSA id u5sm38797062pdc.79.2014.11.18.13.12.37 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 18 Nov 2014 13:12:38 -0800 (PST) From: Jesse Barnes To: intel-gfx@lists.freedesktop.org Date: Tue, 18 Nov 2014 13:12:29 -0800 Message-Id: <1416345149-16985-1-git-send-email-jbarnes@virtuousgeek.org> X-Mailer: git-send-email 1.9.1 Subject: [Intel-gfx] [PATCH] drm/i915: add turbo boost trace point X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Might be helpful for debugging places where userspace ends up boosting or waiting where it doesn't intend to. Signed-off-by: Jesse Barnes Tested-By: PRC QA PRTS (Patch Regression Test System Contact: shuang.he@intel.com) --- drivers/gpu/drm/i915/i915_gem.c | 6 ++++-- drivers/gpu/drm/i915/i915_trace.h | 15 +++++++++++++++ drivers/gpu/drm/i915/intel_pm.c | 9 +++++++-- 3 files changed, 26 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c index 86cf428..b03cb07 100644 --- a/drivers/gpu/drm/i915/i915_gem.c +++ b/drivers/gpu/drm/i915/i915_gem.c @@ -4209,8 +4209,10 @@ i915_gem_object_ggtt_unpin(struct drm_i915_gem_object *obj) struct i915_vma *vma = i915_gem_obj_to_ggtt(obj); BUG_ON(!vma); - BUG_ON(vma->pin_count == 0); - BUG_ON(!i915_gem_obj_ggtt_bound(obj)); + if (WARN(vma->pin_count == 0, "bad pin count\n")) + return; + if (WARN(!i915_gem_obj_ggtt_bound(obj), "obj not bound\n")) + return; if (--vma->pin_count == 0) obj->pin_mappable = false; diff --git a/drivers/gpu/drm/i915/i915_trace.h b/drivers/gpu/drm/i915/i915_trace.h index 751d4ad..d710fe1 100644 --- a/drivers/gpu/drm/i915/i915_trace.h +++ b/drivers/gpu/drm/i915/i915_trace.h @@ -691,6 +691,21 @@ TRACE_EVENT(switch_mm, __entry->dev, __entry->ring, __entry->to, __entry->vm) ); +TRACE_EVENT(turbo_boost, + TP_PROTO(u32 freq), + TP_ARGS(freq), + + TP_STRUCT__entry( + __field(u32, freq) + ), + + TP_fast_assign( + __entry->freq = freq; + ), + + TP_printk("turbo boost to %d MHz", __entry->freq) +); + #endif /* _I915_TRACE_H_ */ /* This part must be outside protection */ diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index 7558ba2..2944593 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -4483,10 +4483,15 @@ void gen6_rps_boost(struct drm_i915_private *dev_priv) mutex_lock(&dev_priv->rps.hw_lock); if (dev_priv->rps.enabled) { - if (IS_VALLEYVIEW(dev)) + if (IS_VALLEYVIEW(dev)) { valleyview_set_rps(dev_priv->dev, dev_priv->rps.max_freq_softlimit); - else + trace_turbo_boost(vlv_gpu_freq(dev_priv, + dev_priv->rps.max_freq_softlimit)); + } else { gen6_set_rps(dev_priv->dev, dev_priv->rps.max_freq_softlimit); + trace_turbo_boost(dev_priv->rps.max_freq_softlimit * 50); + } + dev_priv->rps.last_adj = 0; } mutex_unlock(&dev_priv->rps.hw_lock);