diff mbox

[2/2] drm/i915/ibx: check port in infoframe_enabled

Message ID 1416518654-28749-2-git-send-email-jbarnes@virtuousgeek.org (mailing list archive)
State New, archived
Headers show

Commit Message

Jesse Barnes Nov. 20, 2014, 9:24 p.m. UTC
Just like on g4x we need to check the port enable bit here.

Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
---
 drivers/gpu/drm/i915/intel_hdmi.c | 7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)

Comments

Daniel Vetter Nov. 20, 2014, 9:57 p.m. UTC | #1
On Thu, Nov 20, 2014 at 01:24:14PM -0800, Jesse Barnes wrote:
> Just like on g4x we need to check the port enable bit here.
> 
> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
> ---
>  drivers/gpu/drm/i915/intel_hdmi.c | 7 ++++++-
>  1 file changed, 6 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c
> index ec87333..cc48b51 100644
> --- a/drivers/gpu/drm/i915/intel_hdmi.c
> +++ b/drivers/gpu/drm/i915/intel_hdmi.c
> @@ -222,10 +222,15 @@ static bool ibx_infoframe_enabled(struct drm_encoder *encoder)
>  	struct drm_device *dev = encoder->dev;
>  	struct drm_i915_private *dev_priv = dev->dev_private;
>  	struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);
> +	struct intel_digital_port *intel_dig_port = enc_to_dig_port(encoder);
>  	int reg = TVIDEO_DIP_CTL(intel_crtc->pipe);
>  	u32 val = I915_READ(reg);
> +	u32 port = VIDEO_DIP_PORT(intel_dig_port->port);
>  
> -	return val & VIDEO_DIP_ENABLE;
> +	if (port == (val & VIDEO_DIP_PORT_MASK))
> +		return val & VIDEO_DIP_ENABLE;

I think the only thing that can go wrong is us or the bios making a
complete mess out of the pipe->port assignment for infoframes here. So
I've thought more of

if (val & VIDEO_DIP_ENABLE) {
	WARN_ON(port != (val & VIDEO_DIP_PORT_MASK));
	return true;
}

return false;

I.e. just double-checking that everything is as expected. Otherwise we'd
need to collect infoframes from all pipes I think. But since we don't have
any code to clean up such a mess I hope it doesn't exist in the real world
out there.

Merged the g4x fix to dinq meanwhile.
-Daniel
Jesse Barnes Nov. 20, 2014, 10:33 p.m. UTC | #2
On Thu, 20 Nov 2014 22:57:32 +0100
Daniel Vetter <daniel@ffwll.ch> wrote:

> On Thu, Nov 20, 2014 at 01:24:14PM -0800, Jesse Barnes wrote:
> > Just like on g4x we need to check the port enable bit here.
> > 
> > Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
> > ---
> >  drivers/gpu/drm/i915/intel_hdmi.c | 7 ++++++-
> >  1 file changed, 6 insertions(+), 1 deletion(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/intel_hdmi.c
> > b/drivers/gpu/drm/i915/intel_hdmi.c index ec87333..cc48b51 100644
> > --- a/drivers/gpu/drm/i915/intel_hdmi.c
> > +++ b/drivers/gpu/drm/i915/intel_hdmi.c
> > @@ -222,10 +222,15 @@ static bool ibx_infoframe_enabled(struct
> > drm_encoder *encoder) struct drm_device *dev = encoder->dev;
> >  	struct drm_i915_private *dev_priv = dev->dev_private;
> >  	struct intel_crtc *intel_crtc =
> > to_intel_crtc(encoder->crtc);
> > +	struct intel_digital_port *intel_dig_port =
> > enc_to_dig_port(encoder); int reg =
> > TVIDEO_DIP_CTL(intel_crtc->pipe); u32 val = I915_READ(reg);
> > +	u32 port = VIDEO_DIP_PORT(intel_dig_port->port);
> >  
> > -	return val & VIDEO_DIP_ENABLE;
> > +	if (port == (val & VIDEO_DIP_PORT_MASK))
> > +		return val & VIDEO_DIP_ENABLE;
> 
> I think the only thing that can go wrong is us or the bios making a
> complete mess out of the pipe->port assignment for infoframes here. So
> I've thought more of
> 
> if (val & VIDEO_DIP_ENABLE) {
> 	WARN_ON(port != (val & VIDEO_DIP_PORT_MASK));
> 	return true;
> }
> 
> return false;
> 
> I.e. just double-checking that everything is as expected. Otherwise
> we'd need to collect infoframes from all pipes I think. But since we
> don't have any code to clean up such a mess I hope it doesn't exist
> in the real world out there.

So in that case, we'll set the has_infoframes to true even if
infoframes are enabled on the wrong port, which means we might skip a
mode set later which would clean them up and set the right port...

I like the idea of the WARN though.

Jesse
Shuang He Nov. 22, 2014, 11:31 p.m. UTC | #3
Tested-By: PRC QA PRTS (Patch Regression Test System Contact: shuang.he@intel.com)
-------------------------------------Summary-------------------------------------
Platform          Delta          drm-intel-nightly          Series Applied
PNV                                  367/367              367/367
ILK                                  373/375              373/375
SNB                                  450/450              450/450
IVB                 -4              502/503              498/503
BYT                                  289/289              289/289
HSW                 -3              567/567              564/567
BDW                                  417/417              417/417
-------------------------------------Detailed-------------------------------------
Platform  Test                                drm-intel-nightly          Series Applied
IVB  igt_gem_bad_reloc_negative-reloc-lut      NSPT(3, M21M34M4)PASS(1, M21)      NSPT(2, M21)
IVB  igt_kms_cursor_crc_cursor-64x64-random      PASS(1, M21)      DMESG_WARN(1, M21)PASS(1, M21)
IVB  igt_kms_cursor_crc_cursor-64x64-sliding      PASS(1, M21)      DMESG_WARN(1, M21)PASS(1, M21)
IVB  igt_kms_setmode_invalid-clone-exclusive-crtc      PASS(1, M21)      DMESG_WARN(1, M21)PASS(1, M21)
HSW  igt_gem_bad_reloc_negative-reloc-lut      NSPT(9, M40M20)PASS(1, M20)      NSPT(1, M20)
HSW  igt_kms_rotation_crc_primary-rotation      PASS(10, M20M40)      DMESG_WARN(1, M20)
HSW  igt_pm_rc6_residency_rc6-accuracy      PASS(10, M20M40)      FAIL(1, M20)
diff mbox

Patch

diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c
index ec87333..cc48b51 100644
--- a/drivers/gpu/drm/i915/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/intel_hdmi.c
@@ -222,10 +222,15 @@  static bool ibx_infoframe_enabled(struct drm_encoder *encoder)
 	struct drm_device *dev = encoder->dev;
 	struct drm_i915_private *dev_priv = dev->dev_private;
 	struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);
+	struct intel_digital_port *intel_dig_port = enc_to_dig_port(encoder);
 	int reg = TVIDEO_DIP_CTL(intel_crtc->pipe);
 	u32 val = I915_READ(reg);
+	u32 port = VIDEO_DIP_PORT(intel_dig_port->port);
 
-	return val & VIDEO_DIP_ENABLE;
+	if (port == (val & VIDEO_DIP_PORT_MASK))
+		return val & VIDEO_DIP_ENABLE;
+
+	return false;
 }
 
 static void cpt_write_infoframe(struct drm_encoder *encoder,