From patchwork Thu Nov 20 21:41:24 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jesse Barnes X-Patchwork-Id: 5351001 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 771079F2F1 for ; Thu, 20 Nov 2014 21:41:40 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id BBE3B2013D for ; Thu, 20 Nov 2014 21:41:39 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id F1767200CA for ; Thu, 20 Nov 2014 21:41:38 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 9E4246FAF6; Thu, 20 Nov 2014 13:41:38 -0800 (PST) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail-pa0-f46.google.com (mail-pa0-f46.google.com [209.85.220.46]) by gabe.freedesktop.org (Postfix) with ESMTP id ADD3A6FAF8 for ; Thu, 20 Nov 2014 13:41:36 -0800 (PST) Received: by mail-pa0-f46.google.com with SMTP id lj1so3349560pab.5 for ; Thu, 20 Nov 2014 13:41:36 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=from:to:subject:date:message-id:in-reply-to:references; bh=nXsKOeCISIy5y6MEYWrtU3t4bWq0Cgt1UfJc9NHK5po=; b=davSkvNOe8uLGZ0Xe3S7dSmIatWDfIXYwxlvF9NHJDFvrhkl6SNtXiXURfeWSsVTPk NwZ8SEGcXj/e49AnjB7J4Qshpj1nNcup2Dpdv1QPj45SyY5zz5OVvHDkThwtQDx7CvMy K3nU+PbD40QxUyiGYBPOWsdITtnfPfAUXllf/z2k7Tb60JCnV0Jk8jv1FNLgdqEaloIj QmUV71i5IAJInnuJXQJ5qnsUTS3/SyWpgGgCiiMJRKAvIsSA2M1cZSyy4wG9dsHLo88q 4GKPUElFFc17SmzjWSIEQeowHv5zqYDfxDfhuQ/xxgdxHUbeOJY1jRUT4f6mMd0ynMM+ MEMQ== X-Received: by 10.68.91.66 with SMTP id cc2mr863071pbb.156.1416519696488; Thu, 20 Nov 2014 13:41:36 -0800 (PST) Received: from jbarnes-t420.intel.com (c-67-161-37-189.hsd1.ca.comcast.net. [67.161.37.189]) by mx.google.com with ESMTPSA id z15sm2916111pdi.6.2014.11.20.13.41.35 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 20 Nov 2014 13:41:35 -0800 (PST) From: Jesse Barnes To: intel-gfx@lists.freedesktop.org Date: Thu, 20 Nov 2014 13:41:24 -0800 Message-Id: <1416519684-30459-1-git-send-email-jbarnes@virtuousgeek.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1416519027-28945-1-git-send-email-jbarnes@virtuousgeek.org> References: <1416519027-28945-1-git-send-email-jbarnes@virtuousgeek.org> Subject: [Intel-gfx] [PATCH] drm/i915/vlv: check port in infoframe_enabled v2 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Same as IBX and G4x, they all share the same genetic material. v2: we all need a bit more port in our lives Signed-off-by: Jesse Barnes Tested-By: PRC QA PRTS (Patch Regression Test System Contact: shuang.he@intel.com) --- drivers/gpu/drm/i915/intel_hdmi.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c index cc48b51..43f17ff 100644 --- a/drivers/gpu/drm/i915/intel_hdmi.c +++ b/drivers/gpu/drm/i915/intel_hdmi.c @@ -328,10 +328,15 @@ static bool vlv_infoframe_enabled(struct drm_encoder *encoder) struct drm_device *dev = encoder->dev; struct drm_i915_private *dev_priv = dev->dev_private; struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc); + struct intel_digital_port *intel_dig_port = enc_to_dig_port(encoder); int reg = VLV_TVIDEO_DIP_CTL(intel_crtc->pipe); u32 val = I915_READ(reg); + u32 port = intel_dig_port->port; - return val & VIDEO_DIP_ENABLE; + if (port == (val & VIDEO_DIP_PORT_MASK)) + return val & VIDEO_DIP_ENABLE; + + return false; } static void hsw_write_infoframe(struct drm_encoder *encoder,