Message ID | 1417787376-17253-5-git-send-email-John.C.Harrison@Intel.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Tested-By: PRC QA PRTS (Patch Regression Test System Contact: shuang.he@intel.com)
-------------------------------------Summary-------------------------------------
Platform Delta drm-intel-nightly Series Applied
PNV 364/364 364/364
ILK 366/366 366/366
SNB -1 450/450 449/450
IVB +17 481/498 498/498
BYT 289/289 289/289
HSW -1 564/564 563/564
BDW 417/417 417/417
-------------------------------------Detailed-------------------------------------
Platform Test drm-intel-nightly Series Applied
SNB igt_kms_force_connector NRUN(3, M35M22)PASS(1, M35) NRUN(1, M35)
IVB igt_kms_3d DMESG_WARN(1, M34)PASS(13, M4M34M21) PASS(1, M4)
IVB igt_kms_cursor_crc_cursor-128x128-onscreen NSPT(1, M34)PASS(13, M4M34M21) PASS(1, M4)
IVB igt_kms_cursor_crc_cursor-128x128-random NSPT(1, M34)PASS(13, M4M34M21) PASS(1, M4)
IVB igt_kms_cursor_crc_cursor-128x128-sliding NSPT(1, M34)PASS(13, M4M34M21) PASS(1, M4)
IVB igt_kms_cursor_crc_cursor-256x256-offscreen NSPT(1, M34)PASS(13, M4M34M21) PASS(1, M4)
IVB igt_kms_cursor_crc_cursor-256x256-onscreen NSPT(1, M34)PASS(13, M4M34M21) PASS(1, M4)
IVB igt_kms_cursor_crc_cursor-256x256-sliding NSPT(1, M34)PASS(13, M4M34M21) PASS(1, M4)
IVB igt_kms_cursor_crc_cursor-64x64-offscreen NSPT(1, M34)PASS(13, M4M34M21) PASS(1, M4)
IVB igt_kms_cursor_crc_cursor-64x64-onscreen NSPT(1, M34)PASS(13, M4M34M21) PASS(1, M4)
IVB igt_kms_cursor_crc_cursor-64x64-random NSPT(1, M34)PASS(13, M4M34M21) PASS(1, M4)
IVB igt_kms_cursor_crc_cursor-64x64-sliding NSPT(1, M34)PASS(13, M4M34M21) PASS(1, M4)
IVB igt_kms_cursor_crc_cursor-size-change NSPT(1, M34)PASS(13, M4M34M21) PASS(1, M4)
IVB igt_kms_fence_pin_leak NSPT(1, M34)PASS(13, M4M34M21) PASS(1, M4)
IVB igt_kms_mmio_vs_cs_flip_setcrtc_vs_cs_flip NSPT(1, M34)PASS(13, M4M34M21) PASS(1, M4)
IVB igt_kms_mmio_vs_cs_flip_setplane_vs_cs_flip NSPT(1, M34)PASS(13, M4M34M21) PASS(1, M4)
IVB igt_kms_rotation_crc_primary-rotation NSPT(1, M34)PASS(13, M4M34M21) PASS(1, M4)
IVB igt_kms_rotation_crc_sprite-rotation NSPT(1, M34)PASS(13, M4M34M21) PASS(1, M4)
HSW igt_kms_force_connector NRUN(3, M40M19M20)PASS(1, M40) NRUN(1, M20)
Note: You need to pay more attention to line start with '*'
On Fri, Dec 05, 2014 at 01:49:36PM +0000, John.C.Harrison@Intel.com wrote: > From: John Harrison <John.C.Harrison@Intel.com> > > Added the request structure's 'uniq' identifier to the trace information. Also > renamed the '_complete' trace event to '_notify' as it actually happens in the > IRQ 'notify_ring()' function. The intention is to add a new '_complete' trace > event which occurs when a request structure is actually marked as complete. > However, at the moment the completion status is re-tested every time the query > is made so there isn't a completion event as such. > > v2: New patch added to series. > > v3: Rebased to remove completion caching as that is apparently contentious. > > Change-Id: Ic9bcde67d175c6c03b96217cdcb6e4cc4aa45d67 > For: VIZ-4377 > Signed-off-by: John Harrison <John.C.Harrison@Intel.com> > Reviewed-by: Thomas Daniel <Thomas.Daniel@intel.com> Ok I guess you'll hate this by now, but struct fence provides all this already, too. It doesn't use the uniq id trick you have put instead just uses the pointer. But there's create/destroy tracepoints too afaik, so I think we're covered. I've merged the first two patches from this series, thanks. -Daniel
On Fri, Dec 05, 2014 at 09:48:03PM +0100, Daniel Vetter wrote: > On Fri, Dec 05, 2014 at 01:49:36PM +0000, John.C.Harrison@Intel.com wrote: > > From: John Harrison <John.C.Harrison@Intel.com> > > > > Added the request structure's 'uniq' identifier to the trace information. Also > > renamed the '_complete' trace event to '_notify' as it actually happens in the > > IRQ 'notify_ring()' function. The intention is to add a new '_complete' trace > > event which occurs when a request structure is actually marked as complete. > > However, at the moment the completion status is re-tested every time the query > > is made so there isn't a completion event as such. > > > > v2: New patch added to series. > > > > v3: Rebased to remove completion caching as that is apparently contentious. > > > > Change-Id: Ic9bcde67d175c6c03b96217cdcb6e4cc4aa45d67 > > For: VIZ-4377 > > Signed-off-by: John Harrison <John.C.Harrison@Intel.com> > > Reviewed-by: Thomas Daniel <Thomas.Daniel@intel.com> > > Ok I guess you'll hate this by now, but struct fence provides all this > already, too. It doesn't use the uniq id trick you have put instead just > uses the pointer. But there's create/destroy tracepoints too afaik, so I > think we're covered. > > I've merged the first two patches from this series, thanks. Well changed my mind again since it's just an extension of what we have. So patches 3&4 are merged, too. But yeah I think we really sould switch over to the fence stuff for all this. -Daniel
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c index 7913a72..08a5a4b 100644 --- a/drivers/gpu/drm/i915/i915_irq.c +++ b/drivers/gpu/drm/i915/i915_irq.c @@ -1013,7 +1013,7 @@ static void notify_ring(struct drm_device *dev, if (!intel_ring_initialized(ring)) return; - trace_i915_gem_request_complete(ring); + trace_i915_gem_request_notify(ring); wake_up_all(&ring->irq_queue); } diff --git a/drivers/gpu/drm/i915/i915_trace.h b/drivers/gpu/drm/i915/i915_trace.h index 2ade958..6058a01 100644 --- a/drivers/gpu/drm/i915/i915_trace.h +++ b/drivers/gpu/drm/i915/i915_trace.h @@ -406,6 +406,7 @@ DECLARE_EVENT_CLASS(i915_gem_request, TP_STRUCT__entry( __field(u32, dev) __field(u32, ring) + __field(u32, uniq) __field(u32, seqno) ), @@ -414,11 +415,13 @@ DECLARE_EVENT_CLASS(i915_gem_request, i915_gem_request_get_ring(req); __entry->dev = ring->dev->primary->index; __entry->ring = ring->id; + __entry->uniq = req ? req->uniq : 0; __entry->seqno = i915_gem_request_get_seqno(req); ), - TP_printk("dev=%u, ring=%u, seqno=%u", - __entry->dev, __entry->ring, __entry->seqno) + TP_printk("dev=%u, ring=%u, uniq=%u, seqno=%u", + __entry->dev, __entry->ring, __entry->uniq, + __entry->seqno) ); DEFINE_EVENT(i915_gem_request, i915_gem_request_add, @@ -426,7 +429,7 @@ DEFINE_EVENT(i915_gem_request, i915_gem_request_add, TP_ARGS(req) ); -TRACE_EVENT(i915_gem_request_complete, +TRACE_EVENT(i915_gem_request_notify, TP_PROTO(struct intel_engine_cs *ring), TP_ARGS(ring), @@ -451,6 +454,11 @@ DEFINE_EVENT(i915_gem_request, i915_gem_request_retire, TP_ARGS(req) ); +DEFINE_EVENT(i915_gem_request, i915_gem_request_complete, + TP_PROTO(struct drm_i915_gem_request *req), + TP_ARGS(req) +); + TRACE_EVENT(i915_gem_request_wait_begin, TP_PROTO(struct drm_i915_gem_request *req), TP_ARGS(req), @@ -458,6 +466,7 @@ TRACE_EVENT(i915_gem_request_wait_begin, TP_STRUCT__entry( __field(u32, dev) __field(u32, ring) + __field(u32, uniq) __field(u32, seqno) __field(bool, blocking) ), @@ -473,14 +482,15 @@ TRACE_EVENT(i915_gem_request_wait_begin, i915_gem_request_get_ring(req); __entry->dev = ring->dev->primary->index; __entry->ring = ring->id; + __entry->uniq = req ? req->uniq : 0; __entry->seqno = i915_gem_request_get_seqno(req); __entry->blocking = mutex_is_locked(&ring->dev->struct_mutex); ), - TP_printk("dev=%u, ring=%u, seqno=%u, blocking=%s", - __entry->dev, __entry->ring, __entry->seqno, - __entry->blocking ? "yes (NB)" : "no") + TP_printk("dev=%u, ring=%u, uniq=%u, seqno=%u, blocking=%s", + __entry->dev, __entry->ring, __entry->uniq, + __entry->seqno, __entry->blocking ? "yes (NB)" : "no") ); DEFINE_EVENT(i915_gem_request, i915_gem_request_wait_end,