From patchwork Sun Dec 7 14:27:32 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: vandana.kannan@intel.com X-Patchwork-Id: 5451961 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 2AB7D9F30B for ; Sun, 7 Dec 2014 14:10:20 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id B068D2015E for ; Sun, 7 Dec 2014 14:10:18 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 587C420155 for ; Sun, 7 Dec 2014 14:10:17 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 6B5206E840; Sun, 7 Dec 2014 06:10:15 -0800 (PST) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by gabe.freedesktop.org (Postfix) with ESMTP id A26A06E840 for ; Sun, 7 Dec 2014 06:10:14 -0800 (PST) Received: from orsmga003.jf.intel.com ([10.7.209.27]) by orsmga102.jf.intel.com with ESMTP; 07 Dec 2014 06:08:58 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.04,691,1406617200"; d="scan'208";a="495009854" Received: from vkannan-desktop.iind.intel.com ([10.223.25.137]) by orsmga003.jf.intel.com with ESMTP; 07 Dec 2014 06:06:38 -0800 From: Vandana Kannan To: intel-gfx@lists.freedesktop.org Date: Sun, 7 Dec 2014 19:57:32 +0530 Message-Id: <1417962453-18516-1-git-send-email-vandana.kannan@intel.com> X-Mailer: git-send-email 2.0.1 Subject: [Intel-gfx] [PATCH 1/2] drm/i915: Parsing Backlight-ON, Backlight-OFF, and Tear-On sequence. X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: vkorjani New sequence are added in GOP to support Backlight enabling and Disabling. also new sequence element I2C is been added this patch provide support to parse thse sequences in driver. Signed-off-by: vkorjani --- drivers/gpu/drm/i915/intel_bios.c | 8 +++++++- drivers/gpu/drm/i915/intel_bios.h | 4 ++++ 2 files changed, 11 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/intel_bios.c b/drivers/gpu/drm/i915/intel_bios.c index a4bd90f..c27cc6d 100644 --- a/drivers/gpu/drm/i915/intel_bios.c +++ b/drivers/gpu/drm/i915/intel_bios.c @@ -710,6 +710,12 @@ static u8 *goto_next_sequence(u8 *data, int *size) data += 3; break; + case MIPI_SEQ_ELEM_I2C: + /* skip by this element payload size */ + data += 6; + len = *data; + data += len + 1; + break; default: DRM_ERROR("Unknown element\n"); return NULL; @@ -854,7 +860,7 @@ parse_mipi(struct drm_i915_private *dev_priv, struct bdb_header *bdb) dev_priv->vbt.dsi.sequence[seq_id] = data; DRM_DEBUG_DRIVER("Found mipi sequence - %d\n", seq_id); } else { - DRM_ERROR("undefined sequence\n"); + DRM_ERROR("undefined sequence - %d\n", seq_id); goto err; } diff --git a/drivers/gpu/drm/i915/intel_bios.h b/drivers/gpu/drm/i915/intel_bios.h index 7603765..136da54 100644 --- a/drivers/gpu/drm/i915/intel_bios.h +++ b/drivers/gpu/drm/i915/intel_bios.h @@ -912,6 +912,9 @@ enum mipi_seq { MIPI_SEQ_DISPLAY_ON, MIPI_SEQ_DISPLAY_OFF, MIPI_SEQ_DEASSERT_RESET, + MIPI_SEQ_BACKLIGHT_ON, + MIPI_SEQ_BACKLIGHT_OFF, + MIPI_SEQ_TEAR_ON, MIPI_SEQ_MAX }; @@ -920,6 +923,7 @@ enum mipi_seq_element { MIPI_SEQ_ELEM_SEND_PKT, MIPI_SEQ_ELEM_DELAY, MIPI_SEQ_ELEM_GPIO, + MIPI_SEQ_ELEM_I2C, MIPI_SEQ_ELEM_STATUS, MIPI_SEQ_ELEM_MAX };