diff mbox

[10/11] drm/i915: HSW+ FBC is tied to pipe A

Message ID 1418054960-1403-11-git-send-email-przanoni@gmail.com (mailing list archive)
State New, archived
Headers show

Commit Message

Paulo Zanoni Dec. 8, 2014, 4:09 p.m. UTC
From: Paulo Zanoni <paulo.r.zanoni@intel.com>

So add code to consider this case.

Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
---
 drivers/gpu/drm/i915/intel_fbc.c | 20 ++++++++++++++++----
 1 file changed, 16 insertions(+), 4 deletions(-)

Comments

Rodrigo Vivi Dec. 13, 2014, 1:23 a.m. UTC | #1
I always ask myself if we should just clean the code and remove all
platforms before HSW that always had many fbc issues. So we could make
it simple and just do for pipe A for all platforms.

Anyway, this looks ok for now
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

On Mon, Dec 8, 2014 at 8:09 AM, Paulo Zanoni <przanoni@gmail.com> wrote:
> From: Paulo Zanoni <paulo.r.zanoni@intel.com>
>
> So add code to consider this case.
>
> Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
> ---
>  drivers/gpu/drm/i915/intel_fbc.c | 20 ++++++++++++++++----
>  1 file changed, 16 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_fbc.c b/drivers/gpu/drm/i915/intel_fbc.c
> index 450d0be..e8dc1d5 100644
> --- a/drivers/gpu/drm/i915/intel_fbc.c
> +++ b/drivers/gpu/drm/i915/intel_fbc.c
> @@ -446,10 +446,16 @@ static bool set_no_fbc_reason(struct drm_i915_private *dev_priv,
>
>  static struct drm_crtc *intel_fbc_find_crtc(struct drm_i915_private *dev_priv)
>  {
> -       struct drm_device *dev = dev_priv->dev;
>         struct drm_crtc *crtc = NULL, *tmp_crtc;
> +       enum pipe pipe;
> +       bool pipe_a_only = false;
> +
> +       if (IS_HASWELL(dev_priv) || INTEL_INFO(dev_priv)->gen >= 8)
> +               pipe_a_only = true;
> +
> +       for_each_pipe(dev_priv, pipe) {
> +               tmp_crtc = dev_priv->pipe_to_crtc_mapping[pipe];
>
> -       for_each_crtc(dev, tmp_crtc) {
>                 if (intel_crtc_active(tmp_crtc) &&
>                     to_intel_crtc(tmp_crtc)->primary_enabled) {
>                         if (crtc) {
> @@ -459,6 +465,9 @@ static struct drm_crtc *intel_fbc_find_crtc(struct drm_i915_private *dev_priv)
>                         }
>                         crtc = tmp_crtc;
>                 }
> +
> +               if (pipe_a_only)
> +                       break;
>         }
>
>         if (!crtc || crtc->primary->fb == NULL) {
> @@ -714,11 +723,14 @@ void intel_fbc_init(struct drm_i915_private *dev_priv)
>                 return;
>         }
>
> -       /* TODO: some platforms have FBC tied to a specific plane! */
> -       for_each_pipe(dev_priv, pipe)
> +       for_each_pipe(dev_priv, pipe) {
>                 dev_priv->fbc.possible_framebuffer_bits |=
>                                 INTEL_FRONTBUFFER_PRIMARY(pipe);
>
> +               if (IS_HASWELL(dev_priv) || INTEL_INFO(dev_priv)->gen >= 8)
> +                       break;
> +       }
> +
>         if (INTEL_INFO(dev_priv)->gen >= 7) {
>                 dev_priv->display.fbc_enabled = ilk_fbc_enabled;
>                 dev_priv->display.enable_fbc = gen7_fbc_enable;
> --
> 2.1.3
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
Daniel Vetter Dec. 15, 2014, 8:41 a.m. UTC | #2
On Fri, Dec 12, 2014 at 05:23:24PM -0800, Rodrigo Vivi wrote:
> I always ask myself if we should just clean the code and remove all
> platforms before HSW that always had many fbc issues. So we could make
> it simple and just do for pipe A for all platforms.

With frontbuffer tracking we should be able to get it going on snb+ at
least. Before that workarounds are too horrible really, and pre-g4x is
fbc1 which is an entirely different beast. Unfortuately our code
implements fbc2 like fbc1 so would benefit from a split at least.
-Daniel
diff mbox

Patch

diff --git a/drivers/gpu/drm/i915/intel_fbc.c b/drivers/gpu/drm/i915/intel_fbc.c
index 450d0be..e8dc1d5 100644
--- a/drivers/gpu/drm/i915/intel_fbc.c
+++ b/drivers/gpu/drm/i915/intel_fbc.c
@@ -446,10 +446,16 @@  static bool set_no_fbc_reason(struct drm_i915_private *dev_priv,
 
 static struct drm_crtc *intel_fbc_find_crtc(struct drm_i915_private *dev_priv)
 {
-	struct drm_device *dev = dev_priv->dev;
 	struct drm_crtc *crtc = NULL, *tmp_crtc;
+	enum pipe pipe;
+	bool pipe_a_only = false;
+
+	if (IS_HASWELL(dev_priv) || INTEL_INFO(dev_priv)->gen >= 8)
+		pipe_a_only = true;
+
+	for_each_pipe(dev_priv, pipe) {
+		tmp_crtc = dev_priv->pipe_to_crtc_mapping[pipe];
 
-	for_each_crtc(dev, tmp_crtc) {
 		if (intel_crtc_active(tmp_crtc) &&
 		    to_intel_crtc(tmp_crtc)->primary_enabled) {
 			if (crtc) {
@@ -459,6 +465,9 @@  static struct drm_crtc *intel_fbc_find_crtc(struct drm_i915_private *dev_priv)
 			}
 			crtc = tmp_crtc;
 		}
+
+		if (pipe_a_only)
+			break;
 	}
 
 	if (!crtc || crtc->primary->fb == NULL) {
@@ -714,11 +723,14 @@  void intel_fbc_init(struct drm_i915_private *dev_priv)
 		return;
 	}
 
-	/* TODO: some platforms have FBC tied to a specific plane! */
-	for_each_pipe(dev_priv, pipe)
+	for_each_pipe(dev_priv, pipe) {
 		dev_priv->fbc.possible_framebuffer_bits |=
 				INTEL_FRONTBUFFER_PRIMARY(pipe);
 
+		if (IS_HASWELL(dev_priv) || INTEL_INFO(dev_priv)->gen >= 8)
+			break;
+	}
+
 	if (INTEL_INFO(dev_priv)->gen >= 7) {
 		dev_priv->display.fbc_enabled = ilk_fbc_enabled;
 		dev_priv->display.enable_fbc = gen7_fbc_enable;