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[11/11] drm/i915: gen5+ can have FBC with multiple pipes

Message ID 1418054960-1403-12-git-send-email-przanoni@gmail.com (mailing list archive)
State New, archived
Headers show

Commit Message

Paulo Zanoni Dec. 8, 2014, 4:09 p.m. UTC
From: Paulo Zanoni <paulo.r.zanoni@intel.com>

So allow it.

Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
---
 drivers/gpu/drm/i915/intel_fbc.c | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

Comments

Shuang He Dec. 9, 2014, 4:08 p.m. UTC | #1
Tested-By: PRC QA PRTS (Patch Regression Test System Contact: shuang.he@intel.com)
-------------------------------------Summary-------------------------------------
Platform          Delta          drm-intel-nightly          Series Applied
PNV                                  364/364              364/364
ILK              +1                 364/366              365/366
SNB                 -1              448/450              447/450
IVB                                  497/498              497/498
BYT                                  289/289              289/289
HSW                                  563/564              563/564
BDW                                  417/417              417/417
-------------------------------------Detailed-------------------------------------
Platform  Test                                drm-intel-nightly          Series Applied
 ILK  igt_kms_flip_wf_vblank-ts-check      DMESG_WARN(1, M26)PASS(5, M26M37)      PASS(1, M37)
*SNB  igt_gem_concurrent_blit_gtt-rcs-early-read-forked      PASS(2, M35M22)      FAIL(1, M22)
Note: You need to pay more attention to line start with '*'
Rodrigo Vivi Dec. 13, 2014, 1:25 a.m. UTC | #2
I keep my with to remove support for old gens but anyway:

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

On Mon, Dec 8, 2014 at 8:09 AM, Paulo Zanoni <przanoni@gmail.com> wrote:
> From: Paulo Zanoni <paulo.r.zanoni@intel.com>
>
> So allow it.
>
> Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
> ---
>  drivers/gpu/drm/i915/intel_fbc.c | 6 ++++--
>  1 file changed, 4 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_fbc.c b/drivers/gpu/drm/i915/intel_fbc.c
> index e8dc1d5..1c22922 100644
> --- a/drivers/gpu/drm/i915/intel_fbc.c
> +++ b/drivers/gpu/drm/i915/intel_fbc.c
> @@ -448,17 +448,19 @@ static struct drm_crtc *intel_fbc_find_crtc(struct drm_i915_private *dev_priv)
>  {
>         struct drm_crtc *crtc = NULL, *tmp_crtc;
>         enum pipe pipe;
> -       bool pipe_a_only = false;
> +       bool pipe_a_only = false, one_pipe_only = false;
>
>         if (IS_HASWELL(dev_priv) || INTEL_INFO(dev_priv)->gen >= 8)
>                 pipe_a_only = true;
> +       else if (INTEL_INFO(dev_priv)->gen <= 4)
> +               one_pipe_only = true;
>
>         for_each_pipe(dev_priv, pipe) {
>                 tmp_crtc = dev_priv->pipe_to_crtc_mapping[pipe];
>
>                 if (intel_crtc_active(tmp_crtc) &&
>                     to_intel_crtc(tmp_crtc)->primary_enabled) {
> -                       if (crtc) {
> +                       if (one_pipe_only && crtc) {
>                                 if (set_no_fbc_reason(dev_priv, FBC_MULTIPLE_PIPES))
>                                         DRM_DEBUG_KMS("more than one pipe active, disabling compression\n");
>                                 return NULL;
> --
> 2.1.3
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
diff mbox

Patch

diff --git a/drivers/gpu/drm/i915/intel_fbc.c b/drivers/gpu/drm/i915/intel_fbc.c
index e8dc1d5..1c22922 100644
--- a/drivers/gpu/drm/i915/intel_fbc.c
+++ b/drivers/gpu/drm/i915/intel_fbc.c
@@ -448,17 +448,19 @@  static struct drm_crtc *intel_fbc_find_crtc(struct drm_i915_private *dev_priv)
 {
 	struct drm_crtc *crtc = NULL, *tmp_crtc;
 	enum pipe pipe;
-	bool pipe_a_only = false;
+	bool pipe_a_only = false, one_pipe_only = false;
 
 	if (IS_HASWELL(dev_priv) || INTEL_INFO(dev_priv)->gen >= 8)
 		pipe_a_only = true;
+	else if (INTEL_INFO(dev_priv)->gen <= 4)
+		one_pipe_only = true;
 
 	for_each_pipe(dev_priv, pipe) {
 		tmp_crtc = dev_priv->pipe_to_crtc_mapping[pipe];
 
 		if (intel_crtc_active(tmp_crtc) &&
 		    to_intel_crtc(tmp_crtc)->primary_enabled) {
-			if (crtc) {
+			if (one_pipe_only && crtc) {
 				if (set_no_fbc_reason(dev_priv, FBC_MULTIPLE_PIPES))
 					DRM_DEBUG_KMS("more than one pipe active, disabling compression\n");
 				return NULL;