From patchwork Wed Dec 10 20:52:57 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: vandana.kannan@intel.com X-Patchwork-Id: 5472111 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 8C61ABEEA8 for ; Wed, 10 Dec 2014 20:35:47 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id A69CF2017D for ; Wed, 10 Dec 2014 20:35:46 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id ABB6020172 for ; Wed, 10 Dec 2014 20:35:45 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 33E157A035; Wed, 10 Dec 2014 12:35:45 -0800 (PST) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by gabe.freedesktop.org (Postfix) with ESMTP id E7A447A035 for ; Wed, 10 Dec 2014 12:35:43 -0800 (PST) Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by fmsmga102.fm.intel.com with ESMTP; 10 Dec 2014 12:35:43 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.07,553,1413270000"; d="scan'208";a="645655940" Received: from vkannan-desktop.iind.intel.com ([10.223.25.137]) by fmsmga002.fm.intel.com with ESMTP; 10 Dec 2014 12:35:42 -0800 From: Vandana Kannan To: intel-gfx@lists.freedesktop.org Date: Thu, 11 Dec 2014 02:22:57 +0530 Message-Id: <1418244777-4964-9-git-send-email-vandana.kannan@intel.com> X-Mailer: git-send-email 2.0.1 In-Reply-To: <1418244777-4964-1-git-send-email-vandana.kannan@intel.com> References: <1418244777-4964-1-git-send-email-vandana.kannan@intel.com> Subject: [Intel-gfx] [PATCH 8/8] drm/i915: Add drrs_interval module parameter X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Adding i915 module parameter for setting drrs_interval. If this param is set to 0, then drrs is disabled. If changed in runtime, then the new interval value will be considered for scheduling the next drrs work. drrs_interval is set to 0 by default, i.e. DRRS is disabled by default. Signed-off-by: Vandana Kannan Tested-By: PRC QA PRTS (Patch Regression Test System Contact: shuang.he@intel.com) --- drivers/gpu/drm/i915/i915_drv.h | 1 + drivers/gpu/drm/i915/i915_params.c | 8 ++++++++ drivers/gpu/drm/i915/intel_dp.c | 11 ++++++++++- 3 files changed, 19 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 370cbaa..dba5844 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -2381,6 +2381,7 @@ struct i915_params { int enable_ips; int invert_brightness; int enable_cmd_parser; + int drrs_interval; /* leave bools at the end to not create holes */ bool enable_hangcheck; bool fastboot; diff --git a/drivers/gpu/drm/i915/i915_params.c b/drivers/gpu/drm/i915/i915_params.c index c91cb20..80492e8 100644 --- a/drivers/gpu/drm/i915/i915_params.c +++ b/drivers/gpu/drm/i915/i915_params.c @@ -51,6 +51,7 @@ struct i915_params i915 __read_mostly = { .disable_vtd_wa = 0, .use_mmio_flip = 0, .mmio_debug = 0, + .drrs_interval = 0, }; module_param_named(modeset, i915.modeset, int, 0400); @@ -173,3 +174,10 @@ module_param_named(mmio_debug, i915.mmio_debug, bool, 0600); MODULE_PARM_DESC(mmio_debug, "Enable the MMIO debug code (default: false). This may negatively " "affect performance."); + +module_param_named(drrs_interval, i915.drrs_interval, int, 0600); +MODULE_PARM_DESC(drrs_interval, + "DRRS idleness detection interval (default: 0 ms). " + "If this field is set to 0, then seamless DRRS feature " + "based on idleness detection is disabled. " + "The interval is to be set in milliseconds."); diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index 092ef91..88f46906 100644 --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c @@ -4931,6 +4931,9 @@ void intel_edp_drrs_invalidate(struct drm_device *dev, if (!dev_priv->drrs.dp) return; + if (i915.drrs_interval == 0) + return; + mutex_lock(&dev_priv->drrs.mutex); crtc = dp_to_dig_port(dev_priv->drrs.dp)->base.base.crtc; pipe = to_intel_crtc(crtc)->pipe; @@ -4958,6 +4961,9 @@ void intel_edp_drrs_flush(struct drm_device *dev, if (!dev_priv->drrs.dp) return; + if (i915.drrs_interval == 0) + return; + mutex_lock(&dev_priv->drrs.mutex); crtc = dp_to_dig_port(dev_priv->drrs.dp)->base.base.crtc; pipe = to_intel_crtc(crtc)->pipe; @@ -4968,7 +4974,7 @@ void intel_edp_drrs_flush(struct drm_device *dev, if (dev_priv->drrs.refresh_rate_type != DRRS_LOW_RR && !dev_priv->drrs.busy_frontbuffer_bits) schedule_delayed_work(&dev_priv->drrs.work, - msecs_to_jiffies(1000)); + msecs_to_jiffies(i915.drrs_interval)); mutex_unlock(&dev_priv->drrs.mutex); } @@ -4991,6 +4997,9 @@ intel_dp_drrs_init(struct intel_connector *intel_connector, return NULL; } + if (i915.drrs_interval == 0) + DRM_DEBUG_KMS("DRRS disable by flag\n"); + downclock_mode = intel_find_panel_downclock (dev, fixed_mode, connector);