From patchwork Tue Dec 23 12:35:42 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paulo Zanoni X-Patchwork-Id: 5533141 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 7D7FBBEEA8 for ; Tue, 23 Dec 2014 12:36:52 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 6E224201B9 for ; Tue, 23 Dec 2014 12:36:51 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id A5EB820165 for ; Tue, 23 Dec 2014 12:36:45 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 16DFB6E499; Tue, 23 Dec 2014 04:36:45 -0800 (PST) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail-vc0-f174.google.com (mail-vc0-f174.google.com [209.85.220.174]) by gabe.freedesktop.org (Postfix) with ESMTP id 970006E45B for ; Tue, 23 Dec 2014 04:36:43 -0800 (PST) Received: by mail-vc0-f174.google.com with SMTP id id10so2286824vcb.19 for ; Tue, 23 Dec 2014 04:36:43 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=5rf8SxhA98F7oyUiShWzLoZSyDtJlqYtaewp+QVhGJo=; b=XL5WIKaIHMFhUzCw+X29ZTuT5PngIjvLs+Lx2LCoOeOD5bp6TCJpA9h71JN+iU/tI4 1X1uwARLUCgEBtK+XdhLCHFKgRd/2lV95hAgJaq3ITKqfILZECcE44HFA9wqdI1uetgq cVFqtVbdmx4HyN9csRLUZ7AIPZHY/JEu5lO9skP8rb0yE+AMoCTlNQIosg9qrxlQE4kx R8wcehZ5SgF5klF4LFoOtK4ImfWNmyVjJeJN8xz4/nleHSH9+0MJ5LQVp8VQv9WRqsSD ABIkG5hpV7rjPoGTxcy54ZNhhXk4v18gktG62P5hcYTGnxEs4/KLaLVd775F1y9n1Rk5 ZXKQ== X-Received: by 10.52.144.65 with SMTP id sk1mr8306738vdb.39.1419338203235; Tue, 23 Dec 2014 04:36:43 -0800 (PST) Received: from localhost.localdomain ([177.92.19.202]) by mx.google.com with ESMTPSA id at12sm4915045vdc.15.2014.12.23.04.36.41 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 23 Dec 2014 04:36:42 -0800 (PST) From: Paulo Zanoni To: intel-gfx@lists.freedesktop.org Date: Tue, 23 Dec 2014 10:35:42 -0200 Message-Id: <1419338145-1912-7-git-send-email-przanoni@gmail.com> X-Mailer: git-send-email 2.1.3 In-Reply-To: <1419338145-1912-1-git-send-email-przanoni@gmail.com> References: <1419338145-1912-1-git-send-email-przanoni@gmail.com> Cc: Paulo Zanoni Subject: [Intel-gfx] [PATCH 6/9] drm/i915: add the FBC mutex X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-4.1 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_MED, T_DKIM_INVALID, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Paulo Zanoni Make sure we're not gonna have weird races in really weird cases where a lot of different CRTCs are doing rendering and modesets at the same time. Signed-off-by: Paulo Zanoni --- drivers/gpu/drm/i915/i915_drv.h | 1 + drivers/gpu/drm/i915/intel_fbc.c | 80 +++++++++++++++++++++++++++++++--------- 2 files changed, 64 insertions(+), 17 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index f0419c8..18fcce4 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -734,6 +734,7 @@ enum fb_op_origin { }; struct i915_fbc { + struct mutex lock; unsigned threshold; unsigned int fb_id; unsigned int possible_framebuffer_bits; diff --git a/drivers/gpu/drm/i915/intel_fbc.c b/drivers/gpu/drm/i915/intel_fbc.c index c6e688c..6611266 100644 --- a/drivers/gpu/drm/i915/intel_fbc.c +++ b/drivers/gpu/drm/i915/intel_fbc.c @@ -335,6 +335,7 @@ static void intel_fbc_work_fn(struct work_struct *__work) struct drm_i915_private *dev_priv = dev->dev_private; mutex_lock(&dev->struct_mutex); + mutex_lock(&dev_priv->fbc.lock); if (work == dev_priv->fbc.fbc_work) { /* Double check that we haven't switched fb without cancelling * the prior work. @@ -349,6 +350,7 @@ static void intel_fbc_work_fn(struct work_struct *__work) dev_priv->fbc.fbc_work = NULL; } + mutex_unlock(&dev_priv->fbc.lock); mutex_unlock(&dev->struct_mutex); kfree(work); @@ -356,6 +358,8 @@ static void intel_fbc_work_fn(struct work_struct *__work) static void intel_fbc_cancel_work(struct drm_i915_private *dev_priv) { + lockdep_assert_held(&dev_priv->fbc.lock); + if (dev_priv->fbc.fbc_work == NULL) return; @@ -383,6 +387,8 @@ static void intel_fbc_enable(struct drm_crtc *crtc) struct drm_device *dev = crtc->dev; struct drm_i915_private *dev_priv = dev->dev_private; + lockdep_assert_held(&dev_priv->fbc.lock); + if (!dev_priv->display.enable_fbc) return; @@ -417,16 +423,12 @@ static void intel_fbc_enable(struct drm_crtc *crtc) schedule_delayed_work(&work->work, msecs_to_jiffies(50)); } -/** - * intel_fbc_disable - disable FBC - * @dev: the drm_device - * - * This function disables FBC. - */ -void intel_fbc_disable(struct drm_device *dev) +static void __intel_fbc_disable(struct drm_device *dev) { struct drm_i915_private *dev_priv = dev->dev_private; + lockdep_assert_held(&dev_priv->fbc.lock); + intel_fbc_cancel_work(dev_priv); if (!dev_priv->display.disable_fbc) @@ -436,6 +438,21 @@ void intel_fbc_disable(struct drm_device *dev) dev_priv->fbc.crtc = NULL; } +/** + * intel_fbc_disable - disable FBC + * @dev: the drm_device + * + * This function disables FBC. + */ +void intel_fbc_disable(struct drm_device *dev) +{ + struct drm_i915_private *dev_priv = dev->dev_private; + + mutex_lock(&dev_priv->fbc.lock); + __intel_fbc_disable(dev); + mutex_unlock(&dev_priv->fbc.lock); +} + static bool set_no_fbc_reason(struct drm_i915_private *dev_priv, enum no_fbc_reason reason) { @@ -484,7 +501,7 @@ static struct drm_crtc *intel_fbc_find_crtc(struct drm_i915_private *dev_priv) } /** - * intel_fbc_update - enable/disable FBC as needed + * __intel_fbc_update - enable/disable FBC as needed, unlocked * @dev: the drm_device * * Set up the framebuffer compression hardware at mode set time. We @@ -502,7 +519,7 @@ static struct drm_crtc *intel_fbc_find_crtc(struct drm_i915_private *dev_priv) * * We need to enable/disable FBC on a global basis. */ -void intel_fbc_update(struct drm_device *dev) +static void __intel_fbc_update(struct drm_device *dev) { struct drm_i915_private *dev_priv = dev->dev_private; struct drm_crtc *crtc = NULL; @@ -512,6 +529,8 @@ void intel_fbc_update(struct drm_device *dev) const struct drm_display_mode *adjusted_mode; unsigned int max_width, max_height; + lockdep_assert_held(&dev_priv->fbc.lock); + if (!HAS_FBC(dev)) return; @@ -631,7 +650,7 @@ void intel_fbc_update(struct drm_device *dev) * some point. And we wait before enabling FBC anyway. */ DRM_DEBUG_KMS("disabling active FBC for update\n"); - intel_fbc_disable(dev); + __intel_fbc_disable(dev); } if (i915_gem_stolen_setup_compression(dev, obj->base.size, @@ -649,11 +668,26 @@ out_disable: /* Multiple disables should be harmless */ if (intel_fbc_enabled(dev)) { DRM_DEBUG_KMS("unsupported config, disabling FBC\n"); - intel_fbc_disable(dev); + __intel_fbc_disable(dev); } i915_gem_stolen_cleanup_compression(dev); } +/* + * intel_fbc_update - enable/disable FBC as needed + * @dev: the drm_device + * + * This function reevaluates the overall state and enables or disables FBC. + */ +void intel_fbc_update(struct drm_device *dev) +{ + struct drm_i915_private *dev_priv = dev->dev_private; + + mutex_lock(&dev_priv->fbc.lock); + __intel_fbc_update(dev); + mutex_unlock(&dev_priv->fbc.lock); +} + void intel_fbc_invalidate(struct drm_i915_private *dev_priv, unsigned int frontbuffer_bits, enum fb_op_origin origin) @@ -661,8 +695,10 @@ void intel_fbc_invalidate(struct drm_i915_private *dev_priv, struct drm_device *dev = dev_priv->dev; unsigned int fbc_bits; + mutex_lock(&dev_priv->fbc.lock); + if (origin == ORIGIN_GTT) - return; + goto out; if (dev_priv->fbc.enabled) fbc_bits = INTEL_FRONTBUFFER_PRIMARY(dev_priv->fbc.crtc->pipe); @@ -673,9 +709,12 @@ void intel_fbc_invalidate(struct drm_i915_private *dev_priv, fbc_bits = dev_priv->fbc.possible_framebuffer_bits; if ((fbc_bits & frontbuffer_bits) == 0) - return; + goto out; - intel_fbc_disable(dev); + __intel_fbc_disable(dev); + +out: + mutex_unlock(&dev_priv->fbc.lock); } void intel_fbc_flush(struct drm_i915_private *dev_priv, @@ -686,6 +725,8 @@ void intel_fbc_flush(struct drm_i915_private *dev_priv, unsigned int fbc_bits = 0; bool fbc_enabled; + mutex_lock(&dev_priv->fbc.lock); + if (dev_priv->fbc.enabled) fbc_bits = INTEL_FRONTBUFFER_PRIMARY(dev_priv->fbc.crtc->pipe); else @@ -693,7 +734,7 @@ void intel_fbc_flush(struct drm_i915_private *dev_priv, /* These are not the planes you are looking for. */ if ((frontbuffer_bits & fbc_bits) == 0) - return; + goto out; fbc_enabled = intel_fbc_enabled(dev); @@ -703,12 +744,15 @@ void intel_fbc_flush(struct drm_i915_private *dev_priv, if (origin == ORIGIN_CS || origin == ORIGIN_CPU) intel_fbc_nuke(dev_priv); } else { - intel_fbc_update(dev); + __intel_fbc_update(dev); } } else { if (fbc_enabled) - intel_fbc_disable(dev); + __intel_fbc_disable(dev); } + +out: + mutex_unlock(&dev_priv->fbc.lock); } /** @@ -721,6 +765,8 @@ void intel_fbc_init(struct drm_i915_private *dev_priv) { enum pipe pipe; + mutex_init(&dev_priv->fbc.lock); + if (!HAS_FBC(dev_priv)) { dev_priv->fbc.enabled = false; dev_priv->fbc.no_fbc_reason = FBC_UNSUPPORTED;