| Message ID | 1422035574-27991-1-git-send-email-ramalingam.c@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Fri, Jan 23, 2015 at 9:52 AM, Ramalingam C <ramalingam.c@intel.com> wrote: > From: Vandana Kannan <vandana.kannan@intel.com> > > Adding a debugfs entry to determine if DRRS is supported or not > > V2: [By Ram]: Following details about the active crtc will be filled > in seq-file of the debugfs > 1. Encoder output type > 2. DRRS Support on this CRTC > 3. DRRS current state > 4. Current Vrefresh > Format is as follows: > CRTC 1: Output: eDP, DRRS Supported: Yes (Seamless), DRRS_State: DRRS_HIGH_RR, Vrefresh: 60 > CRTC 2: Output: HDMI, DRRS Supported : No, VBT DRRS_type: Seamless > CRTC 1: Output: eDP, DRRS Supported: Yes (Seamless), DRRS_State: DRRS_LOW_RR, Vrefresh: 40 > CRTC 2: Output: HDMI, DRRS Supported : No, VBT DRRS_type: Seamless > > V3: [By Ram]: Readability is improved. > Another error case is covered [Daniel] > > Signed-off-by: Vandana Kannan <vandana.kannan@intel.com> > Signed-off-by: Ramalingam C <ramalingam.c@intel.com> > --- > drivers/gpu/drm/i915/i915_debugfs.c | 85 +++++++++++++++++++++++++++++++++++ > 1 file changed, 85 insertions(+) > > diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c > index 2ad4c48..45beb32 100644 > --- a/drivers/gpu/drm/i915/i915_debugfs.c > +++ b/drivers/gpu/drm/i915/i915_debugfs.c > @@ -2819,6 +2819,90 @@ static int i915_ddb_info(struct seq_file *m, void *unused) > return 0; > } > > +static void drrs_status_per_crtc(struct seq_file *m, > + struct drm_device *dev, struct intel_crtc *intel_crtc) > +{ > + struct intel_encoder *intel_encoder; > + struct drm_i915_private *dev_priv = dev->dev_private; > + struct i915_drrs *drrs = &dev_priv->drrs; > + int vrefresh = 0; > + > + for_each_encoder_on_crtc(dev, &intel_crtc->base, intel_encoder) { > + /* Encoder connected on this CRTC */ > + switch (intel_encoder->type) { > + case INTEL_OUTPUT_EDP: > + seq_puts(m, "Output: eDP, "); > + break; > + case INTEL_OUTPUT_DSI: > + seq_puts(m, "Output: DSI, "); > + break; > + case INTEL_OUTPUT_HDMI: > + seq_puts(m, "Output: HDMI, "); > + break; > + case INTEL_OUTPUT_DISPLAYPORT: > + seq_puts(m, "Output: DP, "); > + break; > + default: > + seq_printf(m, "Output: Others (id=%d), ", > + intel_encoder->type); > + } > + } > + > + if (intel_crtc->config->has_drrs) { > + struct intel_panel *panel; > + > + panel = &drrs->dp->attached_connector->panel; > + /* DRRS Supported */ > + seq_puts(m, "DRRS Supported: Yes (Seamless), "); > + if (drrs->refresh_rate_type == DRRS_HIGH_RR) { > + seq_puts(m, "DRRS_State: DRRS_HIGH_RR, "); > + vrefresh = panel->fixed_mode->vrefresh; > + } else if (drrs->refresh_rate_type == DRRS_LOW_RR) { > + seq_puts(m, "DRRS_State: DRRS_LOW_RR, "); > + vrefresh = panel->downclock_mode->vrefresh; > + } else { > + seq_printf(m, "DRRS_State: Unknown(%d), ", > + drrs->refresh_rate_type); > + } > + seq_printf(m, "Vrefresh: %d", vrefresh); > + > + } else { > + /* DRRS not supported. Print the VBT parameter*/ > + seq_puts(m, "DRRS Supported : No, "); > + if (dev_priv->vbt.drrs_type == STATIC_DRRS_SUPPORT) > + seq_puts(m, "VBT DRRS_type: Static"); > + else if (dev_priv->vbt.drrs_type == SEAMLESS_DRRS_SUPPORT) > + seq_puts(m, "VBT DRRS_type: Seamless"); > + else if (dev_priv->vbt.drrs_type == DRRS_NOT_SUPPORTED) > + seq_puts(m, "VBT DRRS_type: None"); > + else > + seq_puts(m, "VBT DRRS_type: Unrecognized Value"); > + } > + seq_puts(m, "\n"); > +} > + > +static int i915_drrs_status(struct seq_file *m, void *unused) > +{ > + struct drm_info_node *node = m->private; > + struct drm_device *dev = node->minor->dev; > + struct intel_crtc *intel_crtc; > + int active_crtc_cnt = 0; > + > + for_each_intel_crtc(dev, intel_crtc) { > + if (intel_crtc->active) { > + active_crtc_cnt++; > + seq_printf(m, "CRTC %d: ", active_crtc_cnt); > + > + drrs_status_per_crtc(m, dev, intel_crtc); > + } > + } > + > + if (!active_crtc_cnt) > + seq_puts(m, "No active crtc found\n"); > + > + return 0; > +} > + > struct pipe_crc_info { > const char *name; > struct drm_device *dev; > @@ -4433,6 +4517,7 @@ static const struct drm_info_list i915_debugfs_list[] = { > {"i915_dp_mst_info", i915_dp_mst_info, 0}, > {"i915_wa_registers", i915_wa_registers, 0}, > {"i915_ddb_info", i915_ddb_info, 0}, > + {"i915_drrs_status", i915_drrs_status, 0}, > }; > #define I915_DEBUGFS_ENTRIES ARRAY_SIZE(i915_debugfs_list) > > -- > 1.7.9.5 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx Debug still don't show current enabled/disabled drrs status. it also could have frontbuffer bits... Anyway this one looks ok and better than first version so feel free to use: Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c index 2ad4c48..45beb32 100644 --- a/drivers/gpu/drm/i915/i915_debugfs.c +++ b/drivers/gpu/drm/i915/i915_debugfs.c @@ -2819,6 +2819,90 @@ static int i915_ddb_info(struct seq_file *m, void *unused) return 0; } +static void drrs_status_per_crtc(struct seq_file *m, + struct drm_device *dev, struct intel_crtc *intel_crtc) +{ + struct intel_encoder *intel_encoder; + struct drm_i915_private *dev_priv = dev->dev_private; + struct i915_drrs *drrs = &dev_priv->drrs; + int vrefresh = 0; + + for_each_encoder_on_crtc(dev, &intel_crtc->base, intel_encoder) { + /* Encoder connected on this CRTC */ + switch (intel_encoder->type) { + case INTEL_OUTPUT_EDP: + seq_puts(m, "Output: eDP, "); + break; + case INTEL_OUTPUT_DSI: + seq_puts(m, "Output: DSI, "); + break; + case INTEL_OUTPUT_HDMI: + seq_puts(m, "Output: HDMI, "); + break; + case INTEL_OUTPUT_DISPLAYPORT: + seq_puts(m, "Output: DP, "); + break; + default: + seq_printf(m, "Output: Others (id=%d), ", + intel_encoder->type); + } + } + + if (intel_crtc->config->has_drrs) { + struct intel_panel *panel; + + panel = &drrs->dp->attached_connector->panel; + /* DRRS Supported */ + seq_puts(m, "DRRS Supported: Yes (Seamless), "); + if (drrs->refresh_rate_type == DRRS_HIGH_RR) { + seq_puts(m, "DRRS_State: DRRS_HIGH_RR, "); + vrefresh = panel->fixed_mode->vrefresh; + } else if (drrs->refresh_rate_type == DRRS_LOW_RR) { + seq_puts(m, "DRRS_State: DRRS_LOW_RR, "); + vrefresh = panel->downclock_mode->vrefresh; + } else { + seq_printf(m, "DRRS_State: Unknown(%d), ", + drrs->refresh_rate_type); + } + seq_printf(m, "Vrefresh: %d", vrefresh); + + } else { + /* DRRS not supported. Print the VBT parameter*/ + seq_puts(m, "DRRS Supported : No, "); + if (dev_priv->vbt.drrs_type == STATIC_DRRS_SUPPORT) + seq_puts(m, "VBT DRRS_type: Static"); + else if (dev_priv->vbt.drrs_type == SEAMLESS_DRRS_SUPPORT) + seq_puts(m, "VBT DRRS_type: Seamless"); + else if (dev_priv->vbt.drrs_type == DRRS_NOT_SUPPORTED) + seq_puts(m, "VBT DRRS_type: None"); + else + seq_puts(m, "VBT DRRS_type: Unrecognized Value"); + } + seq_puts(m, "\n"); +} + +static int i915_drrs_status(struct seq_file *m, void *unused) +{ + struct drm_info_node *node = m->private; + struct drm_device *dev = node->minor->dev; + struct intel_crtc *intel_crtc; + int active_crtc_cnt = 0; + + for_each_intel_crtc(dev, intel_crtc) { + if (intel_crtc->active) { + active_crtc_cnt++; + seq_printf(m, "CRTC %d: ", active_crtc_cnt); + + drrs_status_per_crtc(m, dev, intel_crtc); + } + } + + if (!active_crtc_cnt) + seq_puts(m, "No active crtc found\n"); + + return 0; +} + struct pipe_crc_info { const char *name; struct drm_device *dev; @@ -4433,6 +4517,7 @@ static const struct drm_info_list i915_debugfs_list[] = { {"i915_dp_mst_info", i915_dp_mst_info, 0}, {"i915_wa_registers", i915_wa_registers, 0}, {"i915_ddb_info", i915_ddb_info, 0}, + {"i915_drrs_status", i915_drrs_status, 0}, }; #define I915_DEBUGFS_ENTRIES ARRAY_SIZE(i915_debugfs_list)