From patchwork Mon Feb 9 09:36:09 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Kumar, Mahesh" X-Patchwork-Id: 5800261 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 44C109F336 for ; Mon, 9 Feb 2015 09:37:03 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 6171220117 for ; Mon, 9 Feb 2015 09:37:02 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 7D543200FE for ; Mon, 9 Feb 2015 09:37:01 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 72ABD6E4F7; Mon, 9 Feb 2015 01:37:00 -0800 (PST) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by gabe.freedesktop.org (Postfix) with ESMTP id E872B6E4F7 for ; Mon, 9 Feb 2015 01:36:58 -0800 (PST) Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by orsmga103.jf.intel.com with ESMTP; 09 Feb 2015 01:31:12 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.09,542,1418112000"; d="scan'208";a="675019682" Received: from kumarmah-ubuntu-desk01-desktop.iind.intel.com ([10.223.21.18]) by fmsmga002.fm.intel.com with ESMTP; 09 Feb 2015 01:36:05 -0800 From: "Kumar, Mahesh" To: intel-gfx@lists.freedesktop.org Date: Mon, 9 Feb 2015 15:06:09 +0530 Message-Id: <1423474569-27185-1-git-send-email-mahesh1.kumar@intel.com> X-Mailer: git-send-email 2.3.0 Cc: "Kumar, Mahesh" Subject: [Intel-gfx] [PATCH] drm/i915/skl: Add check for minimum allocable Display Data Blocks X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Fifo Underrun is observed when allocating < minimum allocable blocks for any plane, This patch calculate & checks for upper & lower DDB bound for each plane according to total allocated DDB for that Pipe. Signed-off-by: Kumar, Mahesh --- drivers/gpu/drm/i915/i915_drv.h | 2 ++ drivers/gpu/drm/i915/intel_pm.c | 48 +++++++++++++++++++++++++++++++++++++++++ 2 files changed, 50 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 26ffe8b..fe51a5a 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -1536,6 +1536,8 @@ struct skl_ddb_allocation { struct skl_ddb_entry pipe[I915_MAX_PIPES]; struct skl_ddb_entry plane[I915_MAX_PIPES][I915_MAX_PLANES]; struct skl_ddb_entry cursor[I915_MAX_PIPES]; + uint16_t min_alloc[I915_MAX_PIPES][I915_MAX_PLANES]; + uint16_t max_alloc[I915_MAX_PIPES][I915_MAX_PLANES]; }; struct skl_wm_values { diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index 3c64810..d4d8994 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -2482,6 +2482,43 @@ skl_get_total_relative_data_rate(struct intel_crtc *intel_crtc, } static void +skl_calculate_allocable_blocks(struct intel_crtc *intel_crtc, + const struct skl_pipe_wm_parameters *params, + uint16_t alloc_size, struct skl_ddb_allocation *ddb) +{ + uint16_t min; + uint16_t total_min_alloc = 0; + enum pipe pipe = intel_crtc->pipe; + int plane; + + for (plane = 0; plane < intel_num_planes(intel_crtc); plane++) { + const struct intel_plane_wm_parameters *p; + + p = ¶ms->plane[plane]; + ddb->min_alloc[pipe][plane] = 0; + + if (!p->enabled) + continue; + + /* + * TODO: Calculate PlaneMinAlloc according to X/Y-Tiling + * calculation, for now use X-Tiling PlaneMinAlloc + */ + + min = 8; + + ddb->min_alloc[pipe][plane] = min; + total_min_alloc += min; + + } + + for (plane = 0; plane < intel_num_planes(intel_crtc); plane++) { + ddb->max_alloc[pipe][plane] = alloc_size - total_min_alloc + + ddb->min_alloc[pipe][plane]; + } +} + +static void skl_allocate_pipe_ddb(struct drm_crtc *crtc, const struct intel_wm_config *config, const struct skl_pipe_wm_parameters *params, @@ -2519,6 +2556,8 @@ skl_allocate_pipe_ddb(struct drm_crtc *crtc, total_data_rate = skl_get_total_relative_data_rate(intel_crtc, params); start = alloc->start; + + skl_calculate_allocable_blocks(intel_crtc, params, alloc_size, ddb); for (plane = 0; plane < intel_num_planes(intel_crtc); plane++) { const struct intel_plane_wm_parameters *p; unsigned int data_rate; @@ -2537,6 +2576,15 @@ skl_allocate_pipe_ddb(struct drm_crtc *crtc, plane_blocks = div_u64((uint64_t)alloc_size * data_rate, total_data_rate); + /* + * Limit plane_blocks if out of limit + */ + + if (plane_blocks > ddb->max_alloc[pipe][plane]) + plane_blocks = ddb->max_alloc[pipe][plane]; + if (plane_blocks < ddb->min_alloc[pipe][plane]) + plane_blocks = ddb->min_alloc[pipe][plane]; + ddb->plane[pipe][plane].start = start; ddb->plane[pipe][plane].end = start + plane_blocks;