diff mbox

[06/18] drm/i915/skl: Implement WaSetGAPSunitClckGateDisable

Message ID 1423510402-12605-7-git-send-email-damien.lespiau@intel.com (mailing list archive)
State New, archived
Headers show

Commit Message

Lespiau, Damien Feb. 9, 2015, 7:33 p.m. UTC
Let's also take the opportunity the remove the comment telling it's a
pre-prod W/A, it should be obvious from the stepping test.

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
---
 drivers/gpu/drm/i915/i915_reg.h | 1 +
 drivers/gpu/drm/i915/intel_pm.c | 3 ++-
 2 files changed, 3 insertions(+), 1 deletion(-)

Comments

Nick Hoath Feb. 11, 2015, 2:56 p.m. UTC | #1
On 09/02/2015 19:33, Damien Lespiau wrote:
> Let's also take the opportunity the remove the comment telling it's a
> pre-prod W/A, it should be obvious from the stepping test.
>
> Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>

Reviewed-by: Nick Hoath <nicholas.hoath@intel.com>

> ---
>   drivers/gpu/drm/i915/i915_reg.h | 1 +
>   drivers/gpu/drm/i915/intel_pm.c | 3 ++-
>   2 files changed, 3 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 4ee1964..578fd90 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -6016,6 +6016,7 @@ enum skl_disp_power_wells {
>   #define GEN6_RSTCTL				0x9420
>
>   #define GEN8_UCGCTL6				0x9430
> +#define   GEN8_GAPSUNIT_CLOCK_GATE_DISABLE	(1<<24)
>   #define   GEN8_SDEUNIT_CLOCK_GATE_DISABLE	(1<<14)
>
>   #define GEN6_GFXPAUSE				0xA000
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 03e27c2..2c66423 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -59,9 +59,10 @@ static void skl_init_clock_gating(struct drm_device *dev)
>   	if (INTEL_REVID(dev) == SKL_REVID_A0) {
>   		/*
>   		 * WaDisableSDEUnitClockGating:skl
> -		 * This seems to be a pre-production w/a.
> +		 * WaSetGAPSunitClckGateDisable:skl
>   		 */
>   		I915_WRITE(GEN8_UCGCTL6, I915_READ(GEN8_UCGCTL6) |
> +			   GEN8_GAPSUNIT_CLOCK_GATE_DISABLE |
>   			   GEN8_SDEUNIT_CLOCK_GATE_DISABLE);
>   	}
>   }
>
diff mbox

Patch

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 4ee1964..578fd90 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -6016,6 +6016,7 @@  enum skl_disp_power_wells {
 #define GEN6_RSTCTL				0x9420
 
 #define GEN8_UCGCTL6				0x9430
+#define   GEN8_GAPSUNIT_CLOCK_GATE_DISABLE	(1<<24)
 #define   GEN8_SDEUNIT_CLOCK_GATE_DISABLE	(1<<14)
 
 #define GEN6_GFXPAUSE				0xA000
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 03e27c2..2c66423 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -59,9 +59,10 @@  static void skl_init_clock_gating(struct drm_device *dev)
 	if (INTEL_REVID(dev) == SKL_REVID_A0) {
 		/*
 		 * WaDisableSDEUnitClockGating:skl
-		 * This seems to be a pre-production w/a.
+		 * WaSetGAPSunitClckGateDisable:skl
 		 */
 		I915_WRITE(GEN8_UCGCTL6, I915_READ(GEN8_UCGCTL6) |
+			   GEN8_GAPSUNIT_CLOCK_GATE_DISABLE |
 			   GEN8_SDEUNIT_CLOCK_GATE_DISABLE);
 	}
 }