From patchwork Sat Feb 21 00:11:33 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Chandra Konduru X-Patchwork-Id: 5858811 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id C0268BF440 for ; Sat, 21 Feb 2015 00:12:08 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id BF29120437 for ; Sat, 21 Feb 2015 00:12:07 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 0A45120429 for ; Sat, 21 Feb 2015 00:12:06 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 201956E14C; Fri, 20 Feb 2015 16:12:04 -0800 (PST) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by gabe.freedesktop.org (Postfix) with ESMTP id 514656E14C for ; Fri, 20 Feb 2015 16:12:03 -0800 (PST) Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by fmsmga103.fm.intel.com with ESMTP; 20 Feb 2015 16:04:19 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.09,618,1418112000"; d="scan'208";a="457463650" Received: from cmkondur-desk2.fm.intel.com ([10.19.123.59]) by FMSMGA003.fm.intel.com with ESMTP; 20 Feb 2015 15:56:48 -0800 From: Chandra Konduru To: intel-gfx@lists.freedesktop.org Date: Fri, 20 Feb 2015 16:11:33 -0800 Message-Id: <1424477494-23472-1-git-send-email-chandra.konduru@intel.com> X-Mailer: git-send-email 1.7.9.5 MIME-Version: 1.0 Subject: [Intel-gfx] =?utf-8?q?=5BPATCH_v9=5D_drm/i915/skl=3A_Add_support_?= =?utf-8?q?for_SKL_background_color?= X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-5.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This patch adds support for Skylake display pipe background color. v2: - added property documentation to drm DocBook (Daniel Vetter) - moved property to drm_mode_config (Daniel Vetter) - change to set property to NULL once it is freed. (me) - change to make sure gamma/csc settings were retained during color change (me) - change to make sure background color is restored after a power event (me) v3: - change to add gen check before writing background color (Matt Roper) v4: - change to increase color from 8bpc to 16bpc (Daniel Vetter) v5: - removed initialization of background color to 0 (Damien Lespiau) - added change log to commit message (Damien Lespiau) v6: - optmization to use _PIPE() (Damien Lespiau) - updated max limit value in DocBook (Damien Lespiau) - simplied color conversion equation (Damien Lespiau) - always enable gamma and csc to align with update plane (Damien Lespiau) - move resume restoration code to haswell_crtc_enable (Damien Lespiau) v7: - remove superfluous comments (Damien) - remove unused variables left over between v5 and v6 (Damien) v8: - remove the destruction of the property, DRM core does that for us (Damien) v9: - add ULL to a 64bits constant Reviewed-by: Damien Lespiau Signed-off-by: Chandra Konduru Signed-off-by: Damien Lespiau --- Documentation/DocBook/drm.tmpl | 10 ++++++- drivers/gpu/drm/i915/i915_reg.h | 10 +++++++ drivers/gpu/drm/i915/intel_display.c | 54 ++++++++++++++++++++++++++++++++++ drivers/gpu/drm/i915/intel_drv.h | 2 ++ include/drm/drm_crtc.h | 3 ++ 5 files changed, 78 insertions(+), 1 deletion(-) diff --git a/Documentation/DocBook/drm.tmpl b/Documentation/DocBook/drm.tmpl index 249f0c9..c83ffe6 100644 --- a/Documentation/DocBook/drm.tmpl +++ b/Documentation/DocBook/drm.tmpl @@ -2834,7 +2834,7 @@ void intel_crt_init(struct drm_device *dev) TBD - i915 + i915 Generic "Broadcast RGB" ENUM @@ -2858,6 +2858,14 @@ void intel_crt_init(struct drm_device *dev) TBD + CRTC + “background_color” + Range + Min=0, Max=0xFFFFFFFFFFFF + CRTC + Background color in 16bpc BGR (B-MSB, R-LSB) + + SDVO-TV “mode” ENUM diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 040cd83..2d7a9f5 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -6758,6 +6758,16 @@ enum skl_disp_power_wells { #define PIPE_CSC_POSTOFF_ME(pipe) _PIPE(pipe, _PIPE_A_CSC_POSTOFF_ME, _PIPE_B_CSC_POSTOFF_ME) #define PIPE_CSC_POSTOFF_LO(pipe) _PIPE(pipe, _PIPE_A_CSC_POSTOFF_LO, _PIPE_B_CSC_POSTOFF_LO) +/* Skylake pipe bottom color */ +#define _PIPE_BOTTOM_COLOR_A 0x70034 +#define _PIPE_BOTTOM_COLOR_B 0x71034 +#define _PIPE_BOTTOM_COLOR_C 0x72034 +#define PIPE_BOTTOM_GAMMA_ENABLE (1 << 31) +#define PIPE_BOTTOM_CSC_ENABLE (1 << 30) +#define PIPE_BOTTOM_COLOR_MASK 0x3FFFFFFF +#define PIPE_BOTTOM_COLOR(pipe) \ + _PIPE(pipe, _PIPE_BOTTOM_COLOR_A, _PIPE_BOTTOM_COLOR_B) + /* MIPI DSI registers */ #define _MIPI_PORT(port, a, c) _PORT3(port, a, 0, c) /* ports A and C only */ diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 3b0fe9f..4dc5cb2 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -4413,6 +4413,20 @@ static void haswell_mode_set_planes_workaround(struct intel_crtc *crtc) intel_wait_for_vblank(dev, other_active_crtc->pipe); } +static void skl_crtc_set_background_color(struct intel_crtc *intel_crtc) +{ + struct drm_device *dev = intel_crtc->base.dev; + struct drm_i915_private *dev_priv = dev->dev_private; + + if (INTEL_INFO(dev)->gen < 9) + return; + + I915_WRITE(PIPE_BOTTOM_COLOR(intel_crtc->pipe), + intel_crtc->background_color | + PIPE_BOTTOM_GAMMA_ENABLE | + PIPE_BOTTOM_CSC_ENABLE); +} + static void haswell_crtc_enable(struct drm_crtc *crtc) { struct drm_device *dev = crtc->dev; @@ -4474,6 +4488,8 @@ static void haswell_crtc_enable(struct drm_crtc *crtc) */ intel_crtc_load_lut(crtc); + skl_crtc_set_background_color(intel_crtc); + intel_ddi_set_pipe_settings(crtc); intel_ddi_enable_transcoder_func(crtc); @@ -9882,6 +9898,30 @@ out_hang: return ret; } +static int intel_crtc_set_property(struct drm_crtc *crtc, + struct drm_property *property, uint64_t val) +{ + struct drm_device *dev = crtc->dev; + struct intel_crtc *intel_crtc = to_intel_crtc(crtc); + int i; + + if (INTEL_INFO(dev)->gen >= 9) { + if (property == dev->mode_config.background_color_property) { + uint64_t bottom = 0; + + /* BGR 16bpc ==> RGB 10bpc */ + for (i = 0; i < 3; i++) + bottom |= (((val >> (i * 16 + 6)) & 0x3FF) << ((2 - i) * 10)); + + intel_crtc->background_color = (uint32_t) bottom; + + skl_crtc_set_background_color(intel_crtc); + } + return 0; + } + return -EINVAL; +} + static struct drm_crtc_helper_funcs intel_helper_funcs = { .mode_set_base_atomic = intel_pipe_set_base_atomic, .load_lut = intel_crtc_load_lut, @@ -11660,6 +11700,7 @@ static const struct drm_crtc_funcs intel_crtc_funcs = { .page_flip = intel_crtc_page_flip, .atomic_duplicate_state = intel_crtc_duplicate_state, .atomic_destroy_state = intel_crtc_destroy_state, + .set_property = intel_crtc_set_property, }; static bool ibx_pch_dpll_get_hw_state(struct drm_i915_private *dev_priv, @@ -12341,6 +12382,19 @@ static void intel_crtc_init(struct drm_device *dev, int pipe) drm_crtc_helper_add(&intel_crtc->base, &intel_helper_funcs); WARN_ON(drm_crtc_index(&intel_crtc->base) != intel_crtc->pipe); + + /* background color = 48 bit quantity: MSB BGR 16bpc LSB */ + if (INTEL_INFO(dev)->gen >= 9 && + !dev->mode_config.background_color_property) + dev->mode_config.background_color_property = + drm_property_create_range(dev, 0, "background_color", 0, + 0xFFFFFFFFFFFFULL); + + if (dev->mode_config.background_color_property) + drm_object_attach_property(&intel_crtc->base.base, + dev->mode_config.background_color_property, + intel_crtc->background_color); + return; fail: diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h index 1de8e20..285f908 100644 --- a/drivers/gpu/drm/i915/intel_drv.h +++ b/drivers/gpu/drm/i915/intel_drv.h @@ -493,6 +493,8 @@ struct intel_crtc { struct intel_mmio_flip mmio_flip; struct intel_crtc_atomic_commit atomic; + + uint32_t background_color; }; struct intel_plane_wm_parameters { diff --git a/include/drm/drm_crtc.h b/include/drm/drm_crtc.h index b1465d6..5f8c80a 100644 --- a/include/drm/drm_crtc.h +++ b/include/drm/drm_crtc.h @@ -1122,6 +1122,9 @@ struct drm_mode_config { struct drm_property *prop_crtc_id; struct drm_property *prop_active; + /* crtc properties */ + struct drm_property *background_color_property; + /* DVI-I properties */ struct drm_property *dvi_i_subconnector_property; struct drm_property *dvi_i_select_subconnector_property;