diff mbox

drm/i915: Add debugfs entry for DRRS

Message ID 1424693154-25942-1-git-send-email-ramalingam.c@intel.com (mailing list archive)
State New, archived
Headers show

Commit Message

Ramalingam C Feb. 23, 2015, 12:05 p.m. UTC
From: Vandana Kannan <vandana.kannan@intel.com>

Adding a debugfs entry to determine if DRRS is supported or not

V2: [By Ram]: Following details about the active crtc will be filled
	in seq-file of the debugfs
	1. Encoder output type
	2. DRRS Support on this CRTC
	3. DRRS current state
	4. Current Vrefresh
Format is as follows:
CRTC 1:  Output: eDP, DRRS Supported: Yes (Seamless), DRRS_State: DRRS_HIGH_RR, Vrefresh: 60
CRTC 2:  Output: HDMI, DRRS Supported : No, VBT DRRS_type: Seamless
CRTC 1:  Output: eDP, DRRS Supported: Yes (Seamless), DRRS_State: DRRS_LOW_RR, Vrefresh: 40
CRTC 2:  Output: HDMI, DRRS Supported : No, VBT DRRS_type: Seamless

V3: [By Ram]: Readability is improved.
	Another error case is covered [Daniel]

V4: [By Ram]: Current status of the Idleness DRRS along with
	the Front buffer bits are added to the debugfs. [Rodrigo]

V5: [By Ram]: Rephrased to make it easy to understand.
	And format is modified. [Rodrigo]

Signed-off-by: Vandana Kannan <vandana.kannan@intel.com>
Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
---
 drivers/gpu/drm/i915/i915_debugfs.c |  113 +++++++++++++++++++++++++++++++++++
 1 file changed, 113 insertions(+)

Comments

Rodrigo Vivi Feb. 23, 2015, 6:19 p.m. UTC | #1
On Mon, Feb 23, 2015 at 4:05 AM, Ramalingam C <ramalingam.c@intel.com> wrote:
> From: Vandana Kannan <vandana.kannan@intel.com>
>
> Adding a debugfs entry to determine if DRRS is supported or not
>
> V2: [By Ram]: Following details about the active crtc will be filled
>         in seq-file of the debugfs
>         1. Encoder output type
>         2. DRRS Support on this CRTC
>         3. DRRS current state
>         4. Current Vrefresh
> Format is as follows:
> CRTC 1:  Output: eDP, DRRS Supported: Yes (Seamless), DRRS_State: DRRS_HIGH_RR, Vrefresh: 60
> CRTC 2:  Output: HDMI, DRRS Supported : No, VBT DRRS_type: Seamless
> CRTC 1:  Output: eDP, DRRS Supported: Yes (Seamless), DRRS_State: DRRS_LOW_RR, Vrefresh: 40
> CRTC 2:  Output: HDMI, DRRS Supported : No, VBT DRRS_type: Seamless
>
> V3: [By Ram]: Readability is improved.
>         Another error case is covered [Daniel]
>
> V4: [By Ram]: Current status of the Idleness DRRS along with
>         the Front buffer bits are added to the debugfs. [Rodrigo]
>
> V5: [By Ram]: Rephrased to make it easy to understand.
>         And format is modified. [Rodrigo]
>
> Signed-off-by: Vandana Kannan <vandana.kannan@intel.com>
> Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
> ---
>  drivers/gpu/drm/i915/i915_debugfs.c |  113 +++++++++++++++++++++++++++++++++++
>  1 file changed, 113 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
> index 164fa82..e51001c 100644
> --- a/drivers/gpu/drm/i915/i915_debugfs.c
> +++ b/drivers/gpu/drm/i915/i915_debugfs.c
> @@ -2869,6 +2869,118 @@ static int i915_ddb_info(struct seq_file *m, void *unused)
>         return 0;
>  }
>
> +static void drrs_status_per_crtc(struct seq_file *m,
> +               struct drm_device *dev, struct intel_crtc *intel_crtc)
> +{
> +       struct intel_encoder *intel_encoder;
> +       struct drm_i915_private *dev_priv = dev->dev_private;
> +       struct i915_drrs *drrs = &dev_priv->drrs;
> +       int vrefresh = 0;
> +       u32 work_status;
> +
> +       for_each_encoder_on_crtc(dev, &intel_crtc->base, intel_encoder) {
> +               /* Encoder connected on this CRTC */
> +               switch (intel_encoder->type) {
> +               case INTEL_OUTPUT_EDP:
> +                       seq_puts(m, "eDP:\n");
> +                       break;
> +               case INTEL_OUTPUT_DSI:
> +                       seq_puts(m, "DSI:\n");
> +                       break;
> +               case INTEL_OUTPUT_HDMI:
> +                       seq_puts(m, "HDMI:\n");
> +                       break;
> +               case INTEL_OUTPUT_DISPLAYPORT:
> +                       seq_puts(m, "DP:\n");
> +                       break;
> +               default:
> +                       seq_printf(m, "Other encoder (id=%d).\n",
> +                                               intel_encoder->type);
> +                       return;
> +               }
> +       }
> +
> +       if (dev_priv->vbt.drrs_type == STATIC_DRRS_SUPPORT)
> +               seq_puts(m, "\tVBT: DRRS_type: Static");
> +       else if (dev_priv->vbt.drrs_type == SEAMLESS_DRRS_SUPPORT)
> +               seq_puts(m, "\tVBT: DRRS_type: Seamless");
> +       else if (dev_priv->vbt.drrs_type == DRRS_NOT_SUPPORTED)
> +               seq_puts(m, "\tVBT: DRRS_type: None");
> +       else
> +               seq_puts(m, "\tVBT: DRRS_type: FIXME: Unrecognized Value");
> +
> +       seq_puts(m, "\n\n");
> +
> +       if (intel_crtc->config->has_drrs) {
> +               struct intel_panel *panel;
> +
> +               panel = &drrs->dp->attached_connector->panel;
> +               /* DRRS Supported */
> +               seq_puts(m, "\tDRRS Supported: Yes\n");
> +               seq_printf(m, "\t\tBusy_frontbuffer_bits: 0x%X",
> +                                       drrs->busy_frontbuffer_bits);
> +
> +               seq_puts(m, "\n\t\t");
> +               work_status = work_busy(&drrs->work.work);
> +               if (drrs->busy_frontbuffer_bits) {
> +                       seq_puts(m, "Front buffer: Busy.\n");
> +                       seq_puts(m, "\t\tIdleness DRRS: Disabled");
> +               } else {
> +                       seq_puts(m, "Front buffer: Idle");
> +                       seq_puts(m, "\n\t\t");
> +                       if (drrs->refresh_rate_type == DRRS_HIGH_RR) {
> +                               if (work_status)

Why do you need to check work_busy here?

> +                                       seq_puts(m, "Idleness DRRS: Enabled");
> +                               else
> +                                       seq_puts(m, "Idleness DRRS: Disabled");
> +                       } else if (drrs->refresh_rate_type == DRRS_LOW_RR) {
> +                               seq_puts(m, "Idleness DRRS: Enabled");
> +                       }
> +               }
> +
> +               seq_puts(m, "\n\t\t");
> +               if (drrs->refresh_rate_type == DRRS_HIGH_RR) {
> +                       seq_puts(m, "DRRS_State: DRRS_HIGH_RR\n");
> +                       vrefresh = panel->fixed_mode->vrefresh;
> +               } else if (drrs->refresh_rate_type == DRRS_LOW_RR) {
> +                       seq_puts(m, "DRRS_State: DRRS_LOW_RR\n");
> +                       vrefresh = panel->downclock_mode->vrefresh;
> +               } else {
> +                       seq_printf(m, "DRRS_State: Unknown(%d)\n",
> +                                               drrs->refresh_rate_type);
> +                       return;
> +               }
> +               seq_printf(m, "\t\tVrefresh: %d", vrefresh);
> +
> +       } else {
> +               /* DRRS not supported. Print the VBT parameter*/
> +               seq_puts(m, "\tDRRS Supported : No");
> +       }
> +       seq_puts(m, "\n");
> +}
> +
> +static int i915_drrs_status(struct seq_file *m, void *unused)
> +{
> +       struct drm_info_node *node = m->private;
> +       struct drm_device *dev = node->minor->dev;
> +       struct intel_crtc *intel_crtc;
> +       int active_crtc_cnt = 0;
> +
> +       for_each_intel_crtc(dev, intel_crtc) {
> +               if (intel_crtc->active) {
> +                       active_crtc_cnt++;
> +                       seq_printf(m, "\nCRTC %d:  ", active_crtc_cnt);
> +
> +                       drrs_status_per_crtc(m, dev, intel_crtc);
> +               }
> +       }
> +
> +       if (!active_crtc_cnt)
> +               seq_puts(m, "No active crtc found\n");
> +
> +       return 0;
> +}
> +
>  struct pipe_crc_info {
>         const char *name;
>         struct drm_device *dev;
> @@ -4483,6 +4595,7 @@ static const struct drm_info_list i915_debugfs_list[] = {
>         {"i915_dp_mst_info", i915_dp_mst_info, 0},
>         {"i915_wa_registers", i915_wa_registers, 0},
>         {"i915_ddb_info", i915_ddb_info, 0},
> +       {"i915_drrs_status", i915_drrs_status, 0},
>  };
>  #define I915_DEBUGFS_ENTRIES ARRAY_SIZE(i915_debugfs_list)
>
> --
> 1.7.9.5
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx

Thanks for the changes.
With that explained feel free to use Reviewed-by: Rodrigo Vivi
<rodrigo.vivi@intel.com>
Daniel Vetter Feb. 24, 2015, 12:39 a.m. UTC | #2
On Mon, Feb 23, 2015 at 05:35:54PM +0530, Ramalingam C wrote:
> From: Vandana Kannan <vandana.kannan@intel.com>
> 
> Adding a debugfs entry to determine if DRRS is supported or not
> 
> V2: [By Ram]: Following details about the active crtc will be filled
> 	in seq-file of the debugfs
> 	1. Encoder output type
> 	2. DRRS Support on this CRTC
> 	3. DRRS current state
> 	4. Current Vrefresh
> Format is as follows:
> CRTC 1:  Output: eDP, DRRS Supported: Yes (Seamless), DRRS_State: DRRS_HIGH_RR, Vrefresh: 60
> CRTC 2:  Output: HDMI, DRRS Supported : No, VBT DRRS_type: Seamless
> CRTC 1:  Output: eDP, DRRS Supported: Yes (Seamless), DRRS_State: DRRS_LOW_RR, Vrefresh: 40
> CRTC 2:  Output: HDMI, DRRS Supported : No, VBT DRRS_type: Seamless
> 
> V3: [By Ram]: Readability is improved.
> 	Another error case is covered [Daniel]
> 
> V4: [By Ram]: Current status of the Idleness DRRS along with
> 	the Front buffer bits are added to the debugfs. [Rodrigo]
> 
> V5: [By Ram]: Rephrased to make it easy to understand.
> 	And format is modified. [Rodrigo]
> 
> Signed-off-by: Vandana Kannan <vandana.kannan@intel.com>
> Signed-off-by: Ramalingam C <ramalingam.c@intel.com>

Total absence of locking while walking modesetting structures is a bit
uncool.

> ---
>  drivers/gpu/drm/i915/i915_debugfs.c |  113 +++++++++++++++++++++++++++++++++++
>  1 file changed, 113 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
> index 164fa82..e51001c 100644
> --- a/drivers/gpu/drm/i915/i915_debugfs.c
> +++ b/drivers/gpu/drm/i915/i915_debugfs.c
> @@ -2869,6 +2869,118 @@ static int i915_ddb_info(struct seq_file *m, void *unused)
>  	return 0;
>  }
>  
> +static void drrs_status_per_crtc(struct seq_file *m,
> +		struct drm_device *dev, struct intel_crtc *intel_crtc)
> +{
> +	struct intel_encoder *intel_encoder;
> +	struct drm_i915_private *dev_priv = dev->dev_private;
> +	struct i915_drrs *drrs = &dev_priv->drrs;
> +	int vrefresh = 0;
> +	u32 work_status;
> +
> +	for_each_encoder_on_crtc(dev, &intel_crtc->base, intel_encoder) {
> +		/* Encoder connected on this CRTC */
> +		switch (intel_encoder->type) {
> +		case INTEL_OUTPUT_EDP:
> +			seq_puts(m, "eDP:\n");
> +			break;
> +		case INTEL_OUTPUT_DSI:
> +			seq_puts(m, "DSI:\n");
> +			break;
> +		case INTEL_OUTPUT_HDMI:
> +			seq_puts(m, "HDMI:\n");
> +			break;
> +		case INTEL_OUTPUT_DISPLAYPORT:
> +			seq_puts(m, "DP:\n");
> +			break;
> +		default:
> +			seq_printf(m, "Other encoder (id=%d).\n",
> +						intel_encoder->type);
> +			return;
> +		}
> +	}
> +
> +	if (dev_priv->vbt.drrs_type == STATIC_DRRS_SUPPORT)
> +		seq_puts(m, "\tVBT: DRRS_type: Static");
> +	else if (dev_priv->vbt.drrs_type == SEAMLESS_DRRS_SUPPORT)
> +		seq_puts(m, "\tVBT: DRRS_type: Seamless");
> +	else if (dev_priv->vbt.drrs_type == DRRS_NOT_SUPPORTED)
> +		seq_puts(m, "\tVBT: DRRS_type: None");
> +	else
> +		seq_puts(m, "\tVBT: DRRS_type: FIXME: Unrecognized Value");
> +
> +	seq_puts(m, "\n\n");
> +
> +	if (intel_crtc->config->has_drrs) {
> +		struct intel_panel *panel;
> +
> +		panel = &drrs->dp->attached_connector->panel;

Same here, chasing drrs pointers without grabbing the right locks isn't
awesome either. I've merged all the other patches in this series to dinq.
-Daniel

> +		/* DRRS Supported */
> +		seq_puts(m, "\tDRRS Supported: Yes\n");
> +		seq_printf(m, "\t\tBusy_frontbuffer_bits: 0x%X",
> +					drrs->busy_frontbuffer_bits);
> +
> +		seq_puts(m, "\n\t\t");
> +		work_status = work_busy(&drrs->work.work);
> +		if (drrs->busy_frontbuffer_bits) {
> +			seq_puts(m, "Front buffer: Busy.\n");
> +			seq_puts(m, "\t\tIdleness DRRS: Disabled");
> +		} else {
> +			seq_puts(m, "Front buffer: Idle");
> +			seq_puts(m, "\n\t\t");
> +			if (drrs->refresh_rate_type == DRRS_HIGH_RR) {
> +				if (work_status)
> +					seq_puts(m, "Idleness DRRS: Enabled");
> +				else
> +					seq_puts(m, "Idleness DRRS: Disabled");
> +			} else if (drrs->refresh_rate_type == DRRS_LOW_RR) {
> +				seq_puts(m, "Idleness DRRS: Enabled");
> +			}
> +		}
> +
> +		seq_puts(m, "\n\t\t");
> +		if (drrs->refresh_rate_type == DRRS_HIGH_RR) {
> +			seq_puts(m, "DRRS_State: DRRS_HIGH_RR\n");
> +			vrefresh = panel->fixed_mode->vrefresh;
> +		} else if (drrs->refresh_rate_type == DRRS_LOW_RR) {
> +			seq_puts(m, "DRRS_State: DRRS_LOW_RR\n");
> +			vrefresh = panel->downclock_mode->vrefresh;
> +		} else {
> +			seq_printf(m, "DRRS_State: Unknown(%d)\n",
> +						drrs->refresh_rate_type);
> +			return;
> +		}
> +		seq_printf(m, "\t\tVrefresh: %d", vrefresh);
> +
> +	} else {
> +		/* DRRS not supported. Print the VBT parameter*/
> +		seq_puts(m, "\tDRRS Supported : No");
> +	}
> +	seq_puts(m, "\n");
> +}
> +
> +static int i915_drrs_status(struct seq_file *m, void *unused)
> +{
> +	struct drm_info_node *node = m->private;
> +	struct drm_device *dev = node->minor->dev;
> +	struct intel_crtc *intel_crtc;
> +	int active_crtc_cnt = 0;
> +
> +	for_each_intel_crtc(dev, intel_crtc) {
> +		if (intel_crtc->active) {
> +			active_crtc_cnt++;
> +			seq_printf(m, "\nCRTC %d:  ", active_crtc_cnt);
> +
> +			drrs_status_per_crtc(m, dev, intel_crtc);
> +		}
> +	}
> +
> +	if (!active_crtc_cnt)
> +		seq_puts(m, "No active crtc found\n");
> +
> +	return 0;
> +}
> +
>  struct pipe_crc_info {
>  	const char *name;
>  	struct drm_device *dev;
> @@ -4483,6 +4595,7 @@ static const struct drm_info_list i915_debugfs_list[] = {
>  	{"i915_dp_mst_info", i915_dp_mst_info, 0},
>  	{"i915_wa_registers", i915_wa_registers, 0},
>  	{"i915_ddb_info", i915_ddb_info, 0},
> +	{"i915_drrs_status", i915_drrs_status, 0},
>  };
>  #define I915_DEBUGFS_ENTRIES ARRAY_SIZE(i915_debugfs_list)
>  
> -- 
> 1.7.9.5
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
Ramalingam C Feb. 27, 2015, 1:59 p.m. UTC | #3
On Tuesday 24 February 2015 06:09 AM, Daniel Vetter wrote:
> On Mon, Feb 23, 2015 at 05:35:54PM +0530, Ramalingam C wrote:
>> From: Vandana Kannan <vandana.kannan@intel.com>
>>
>> Adding a debugfs entry to determine if DRRS is supported or not
>>
>> V2: [By Ram]: Following details about the active crtc will be filled
>> 	in seq-file of the debugfs
>> 	1. Encoder output type
>> 	2. DRRS Support on this CRTC
>> 	3. DRRS current state
>> 	4. Current Vrefresh
>> Format is as follows:
>> CRTC 1:  Output: eDP, DRRS Supported: Yes (Seamless), DRRS_State: DRRS_HIGH_RR, Vrefresh: 60
>> CRTC 2:  Output: HDMI, DRRS Supported : No, VBT DRRS_type: Seamless
>> CRTC 1:  Output: eDP, DRRS Supported: Yes (Seamless), DRRS_State: DRRS_LOW_RR, Vrefresh: 40
>> CRTC 2:  Output: HDMI, DRRS Supported : No, VBT DRRS_type: Seamless
>>
>> V3: [By Ram]: Readability is improved.
>> 	Another error case is covered [Daniel]
>>
>> V4: [By Ram]: Current status of the Idleness DRRS along with
>> 	the Front buffer bits are added to the debugfs. [Rodrigo]
>>
>> V5: [By Ram]: Rephrased to make it easy to understand.
>> 	And format is modified. [Rodrigo]
>>
>> Signed-off-by: Vandana Kannan <vandana.kannan@intel.com>
>> Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
> Total absence of locking while walking modesetting structures is a bit
> uncool.
>
>> ---
>>   drivers/gpu/drm/i915/i915_debugfs.c |  113 +++++++++++++++++++++++++++++++++++
>>   1 file changed, 113 insertions(+)
>>
>> diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
>> index 164fa82..e51001c 100644
>> --- a/drivers/gpu/drm/i915/i915_debugfs.c
>> +++ b/drivers/gpu/drm/i915/i915_debugfs.c
>> @@ -2869,6 +2869,118 @@ static int i915_ddb_info(struct seq_file *m, void *unused)
>>   	return 0;
>>   }
>>   
>> +static void drrs_status_per_crtc(struct seq_file *m,
>> +		struct drm_device *dev, struct intel_crtc *intel_crtc)
>> +{
>> +	struct intel_encoder *intel_encoder;
>> +	struct drm_i915_private *dev_priv = dev->dev_private;
>> +	struct i915_drrs *drrs = &dev_priv->drrs;
>> +	int vrefresh = 0;
>> +	u32 work_status;
>> +
>> +	for_each_encoder_on_crtc(dev, &intel_crtc->base, intel_encoder) {
>> +		/* Encoder connected on this CRTC */
>> +		switch (intel_encoder->type) {
>> +		case INTEL_OUTPUT_EDP:
>> +			seq_puts(m, "eDP:\n");
>> +			break;
>> +		case INTEL_OUTPUT_DSI:
>> +			seq_puts(m, "DSI:\n");
>> +			break;
>> +		case INTEL_OUTPUT_HDMI:
>> +			seq_puts(m, "HDMI:\n");
>> +			break;
>> +		case INTEL_OUTPUT_DISPLAYPORT:
>> +			seq_puts(m, "DP:\n");
>> +			break;
>> +		default:
>> +			seq_printf(m, "Other encoder (id=%d).\n",
>> +						intel_encoder->type);
>> +			return;
>> +		}
>> +	}
>> +
>> +	if (dev_priv->vbt.drrs_type == STATIC_DRRS_SUPPORT)
>> +		seq_puts(m, "\tVBT: DRRS_type: Static");
>> +	else if (dev_priv->vbt.drrs_type == SEAMLESS_DRRS_SUPPORT)
>> +		seq_puts(m, "\tVBT: DRRS_type: Seamless");
>> +	else if (dev_priv->vbt.drrs_type == DRRS_NOT_SUPPORTED)
>> +		seq_puts(m, "\tVBT: DRRS_type: None");
>> +	else
>> +		seq_puts(m, "\tVBT: DRRS_type: FIXME: Unrecognized Value");
>> +
>> +	seq_puts(m, "\n\n");
>> +
>> +	if (intel_crtc->config->has_drrs) {
>> +		struct intel_panel *panel;
>> +
>> +		panel = &drrs->dp->attached_connector->panel;
> Same here, chasing drrs pointers without grabbing the right locks isn't
> awesome either. I've merged all the other patches in this series to dinq.
> -Daniel
>
>> +		/* DRRS Supported */
>> +		seq_puts(m, "\tDRRS Supported: Yes\n");
>> +		seq_printf(m, "\t\tBusy_frontbuffer_bits: 0x%X",
>> +					drrs->busy_frontbuffer_bits);
>> +
>> +		seq_puts(m, "\n\t\t");
>> +		work_status = work_busy(&drrs->work.work);
>> +		if (drrs->busy_frontbuffer_bits) {
>> +			seq_puts(m, "Front buffer: Busy.\n");
>> +			seq_puts(m, "\t\tIdleness DRRS: Disabled");
>> +		} else {
>> +			seq_puts(m, "Front buffer: Idle");
>> +			seq_puts(m, "\n\t\t");
>> +			if (drrs->refresh_rate_type == DRRS_HIGH_RR) {
>> +				if (work_status)
>> +					seq_puts(m, "Idleness DRRS: Enabled");
>> +				else
>> +					seq_puts(m, "Idleness DRRS: Disabled");
>> +			} else if (drrs->refresh_rate_type == DRRS_LOW_RR) {
>> +				seq_puts(m, "Idleness DRRS: Enabled");
>> +			}
>> +		}
>> +
>> +		seq_puts(m, "\n\t\t");
>> +		if (drrs->refresh_rate_type == DRRS_HIGH_RR) {
>> +			seq_puts(m, "DRRS_State: DRRS_HIGH_RR\n");
>> +			vrefresh = panel->fixed_mode->vrefresh;
>> +		} else if (drrs->refresh_rate_type == DRRS_LOW_RR) {
>> +			seq_puts(m, "DRRS_State: DRRS_LOW_RR\n");
>> +			vrefresh = panel->downclock_mode->vrefresh;
>> +		} else {
>> +			seq_printf(m, "DRRS_State: Unknown(%d)\n",
>> +						drrs->refresh_rate_type);
>> +			return;
>> +		}
>> +		seq_printf(m, "\t\tVrefresh: %d", vrefresh);
>> +
>> +	} else {
>> +		/* DRRS not supported. Print the VBT parameter*/
>> +		seq_puts(m, "\tDRRS Supported : No");
>> +	}
>> +	seq_puts(m, "\n");
>> +}
>> +
>> +static int i915_drrs_status(struct seq_file *m, void *unused)
>> +{
>> +	struct drm_info_node *node = m->private;
>> +	struct drm_device *dev = node->minor->dev;
>> +	struct intel_crtc *intel_crtc;
>> +	int active_crtc_cnt = 0;
>> +
>> +	for_each_intel_crtc(dev, intel_crtc) {
>> +		if (intel_crtc->active) {
>> +			active_crtc_cnt++;
>> +			seq_printf(m, "\nCRTC %d:  ", active_crtc_cnt);
>> +
>> +			drrs_status_per_crtc(m, dev, intel_crtc);
>> +		}
>> +	}
>> +
>> +	if (!active_crtc_cnt)
>> +		seq_puts(m, "No active crtc found\n");
>> +
>> +	return 0;
>> +}
>> +
>>   struct pipe_crc_info {
>>   	const char *name;
>>   	struct drm_device *dev;
>> @@ -4483,6 +4595,7 @@ static const struct drm_info_list i915_debugfs_list[] = {
>>   	{"i915_dp_mst_info", i915_dp_mst_info, 0},
>>   	{"i915_wa_registers", i915_wa_registers, 0},
>>   	{"i915_ddb_info", i915_ddb_info, 0},
>> +	{"i915_drrs_status", i915_drrs_status, 0},
>>   };
>>   #define I915_DEBUGFS_ENTRIES ARRAY_SIZE(i915_debugfs_list)
>>   
>> -- 
>> 1.7.9.5
>>
>> _______________________________________________
>> Intel-gfx mailing list
>> Intel-gfx@lists.freedesktop.org
>> http://lists.freedesktop.org/mailman/listinfo/intel-gfx

Sorry for missing mutex protection. I will modify accordingly. Thanks 
for the review daniel.
Ramalingam C March 3, 2015, 12:20 p.m. UTC | #4
On Monday 23 February 2015 11:49 PM, Rodrigo Vivi wrote:
> On Mon, Feb 23, 2015 at 4:05 AM, Ramalingam C <ramalingam.c@intel.com> wrote:
>> From: Vandana Kannan <vandana.kannan@intel.com>
>>
>> Adding a debugfs entry to determine if DRRS is supported or not
>>
>> V2: [By Ram]: Following details about the active crtc will be filled
>>          in seq-file of the debugfs
>>          1. Encoder output type
>>          2. DRRS Support on this CRTC
>>          3. DRRS current state
>>          4. Current Vrefresh
>> Format is as follows:
>> CRTC 1:  Output: eDP, DRRS Supported: Yes (Seamless), DRRS_State: DRRS_HIGH_RR, Vrefresh: 60
>> CRTC 2:  Output: HDMI, DRRS Supported : No, VBT DRRS_type: Seamless
>> CRTC 1:  Output: eDP, DRRS Supported: Yes (Seamless), DRRS_State: DRRS_LOW_RR, Vrefresh: 40
>> CRTC 2:  Output: HDMI, DRRS Supported : No, VBT DRRS_type: Seamless
>>
>> V3: [By Ram]: Readability is improved.
>>          Another error case is covered [Daniel]
>>
>> V4: [By Ram]: Current status of the Idleness DRRS along with
>>          the Front buffer bits are added to the debugfs. [Rodrigo]
>>
>> V5: [By Ram]: Rephrased to make it easy to understand.
>>          And format is modified. [Rodrigo]
>>
>> Signed-off-by: Vandana Kannan <vandana.kannan@intel.com>
>> Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
>> ---
>>   drivers/gpu/drm/i915/i915_debugfs.c |  113 +++++++++++++++++++++++++++++++++++
>>   1 file changed, 113 insertions(+)
>>
>> diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
>> index 164fa82..e51001c 100644
>> --- a/drivers/gpu/drm/i915/i915_debugfs.c
>> +++ b/drivers/gpu/drm/i915/i915_debugfs.c
>> @@ -2869,6 +2869,118 @@ static int i915_ddb_info(struct seq_file *m, void *unused)
>>          return 0;
>>   }
>>
>> +static void drrs_status_per_crtc(struct seq_file *m,
>> +               struct drm_device *dev, struct intel_crtc *intel_crtc)
>> +{
>> +       struct intel_encoder *intel_encoder;
>> +       struct drm_i915_private *dev_priv = dev->dev_private;
>> +       struct i915_drrs *drrs = &dev_priv->drrs;
>> +       int vrefresh = 0;
>> +       u32 work_status;
>> +
>> +       for_each_encoder_on_crtc(dev, &intel_crtc->base, intel_encoder) {
>> +               /* Encoder connected on this CRTC */
>> +               switch (intel_encoder->type) {
>> +               case INTEL_OUTPUT_EDP:
>> +                       seq_puts(m, "eDP:\n");
>> +                       break;
>> +               case INTEL_OUTPUT_DSI:
>> +                       seq_puts(m, "DSI:\n");
>> +                       break;
>> +               case INTEL_OUTPUT_HDMI:
>> +                       seq_puts(m, "HDMI:\n");
>> +                       break;
>> +               case INTEL_OUTPUT_DISPLAYPORT:
>> +                       seq_puts(m, "DP:\n");
>> +                       break;
>> +               default:
>> +                       seq_printf(m, "Other encoder (id=%d).\n",
>> +                                               intel_encoder->type);
>> +                       return;
>> +               }
>> +       }
>> +
>> +       if (dev_priv->vbt.drrs_type == STATIC_DRRS_SUPPORT)
>> +               seq_puts(m, "\tVBT: DRRS_type: Static");
>> +       else if (dev_priv->vbt.drrs_type == SEAMLESS_DRRS_SUPPORT)
>> +               seq_puts(m, "\tVBT: DRRS_type: Seamless");
>> +       else if (dev_priv->vbt.drrs_type == DRRS_NOT_SUPPORTED)
>> +               seq_puts(m, "\tVBT: DRRS_type: None");
>> +       else
>> +               seq_puts(m, "\tVBT: DRRS_type: FIXME: Unrecognized Value");
>> +
>> +       seq_puts(m, "\n\n");
>> +
>> +       if (intel_crtc->config->has_drrs) {
>> +               struct intel_panel *panel;
>> +
>> +               panel = &drrs->dp->attached_connector->panel;
>> +               /* DRRS Supported */
>> +               seq_puts(m, "\tDRRS Supported: Yes\n");
>> +               seq_printf(m, "\t\tBusy_frontbuffer_bits: 0x%X",
>> +                                       drrs->busy_frontbuffer_bits);
>> +
>> +               seq_puts(m, "\n\t\t");
>> +               work_status = work_busy(&drrs->work.work);
>> +               if (drrs->busy_frontbuffer_bits) {
>> +                       seq_puts(m, "Front buffer: Busy.\n");
>> +                       seq_puts(m, "\t\tIdleness DRRS: Disabled");
>> +               } else {
>> +                       seq_puts(m, "Front buffer: Idle");
>> +                       seq_puts(m, "\n\t\t");
>> +                       if (drrs->refresh_rate_type == DRRS_HIGH_RR) {
>> +                               if (work_status)
> Why do you need to check work_busy here?
This is to capture the DRRS disabled state due to function 
intel_edp_drrs_disable.
>
>> +                                       seq_puts(m, "Idleness DRRS: Enabled");
>> +                               else
>> +                                       seq_puts(m, "Idleness DRRS: Disabled");
>> +                       } else if (drrs->refresh_rate_type == DRRS_LOW_RR) {
>> +                               seq_puts(m, "Idleness DRRS: Enabled");
>> +                       }
>> +               }
>> +
>> +               seq_puts(m, "\n\t\t");
>> +               if (drrs->refresh_rate_type == DRRS_HIGH_RR) {
>> +                       seq_puts(m, "DRRS_State: DRRS_HIGH_RR\n");
>> +                       vrefresh = panel->fixed_mode->vrefresh;
>> +               } else if (drrs->refresh_rate_type == DRRS_LOW_RR) {
>> +                       seq_puts(m, "DRRS_State: DRRS_LOW_RR\n");
>> +                       vrefresh = panel->downclock_mode->vrefresh;
>> +               } else {
>> +                       seq_printf(m, "DRRS_State: Unknown(%d)\n",
>> +                                               drrs->refresh_rate_type);
>> +                       return;
>> +               }
>> +               seq_printf(m, "\t\tVrefresh: %d", vrefresh);
>> +
>> +       } else {
>> +               /* DRRS not supported. Print the VBT parameter*/
>> +               seq_puts(m, "\tDRRS Supported : No");
>> +       }
>> +       seq_puts(m, "\n");
>> +}
>> +
>> +static int i915_drrs_status(struct seq_file *m, void *unused)
>> +{
>> +       struct drm_info_node *node = m->private;
>> +       struct drm_device *dev = node->minor->dev;
>> +       struct intel_crtc *intel_crtc;
>> +       int active_crtc_cnt = 0;
>> +
>> +       for_each_intel_crtc(dev, intel_crtc) {
>> +               if (intel_crtc->active) {
>> +                       active_crtc_cnt++;
>> +                       seq_printf(m, "\nCRTC %d:  ", active_crtc_cnt);
>> +
>> +                       drrs_status_per_crtc(m, dev, intel_crtc);
>> +               }
>> +       }
>> +
>> +       if (!active_crtc_cnt)
>> +               seq_puts(m, "No active crtc found\n");
>> +
>> +       return 0;
>> +}
>> +
>>   struct pipe_crc_info {
>>          const char *name;
>>          struct drm_device *dev;
>> @@ -4483,6 +4595,7 @@ static const struct drm_info_list i915_debugfs_list[] = {
>>          {"i915_dp_mst_info", i915_dp_mst_info, 0},
>>          {"i915_wa_registers", i915_wa_registers, 0},
>>          {"i915_ddb_info", i915_ddb_info, 0},
>> +       {"i915_drrs_status", i915_drrs_status, 0},
>>   };
>>   #define I915_DEBUGFS_ENTRIES ARRAY_SIZE(i915_debugfs_list)
>>
>> --
>> 1.7.9.5
>>
>> _______________________________________________
>> Intel-gfx mailing list
>> Intel-gfx@lists.freedesktop.org
>> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
> Thanks for the changes.
> With that explained feel free to use Reviewed-by: Rodrigo Vivi
> <rodrigo.vivi@intel.com>
diff mbox

Patch

diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
index 164fa82..e51001c 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -2869,6 +2869,118 @@  static int i915_ddb_info(struct seq_file *m, void *unused)
 	return 0;
 }
 
+static void drrs_status_per_crtc(struct seq_file *m,
+		struct drm_device *dev, struct intel_crtc *intel_crtc)
+{
+	struct intel_encoder *intel_encoder;
+	struct drm_i915_private *dev_priv = dev->dev_private;
+	struct i915_drrs *drrs = &dev_priv->drrs;
+	int vrefresh = 0;
+	u32 work_status;
+
+	for_each_encoder_on_crtc(dev, &intel_crtc->base, intel_encoder) {
+		/* Encoder connected on this CRTC */
+		switch (intel_encoder->type) {
+		case INTEL_OUTPUT_EDP:
+			seq_puts(m, "eDP:\n");
+			break;
+		case INTEL_OUTPUT_DSI:
+			seq_puts(m, "DSI:\n");
+			break;
+		case INTEL_OUTPUT_HDMI:
+			seq_puts(m, "HDMI:\n");
+			break;
+		case INTEL_OUTPUT_DISPLAYPORT:
+			seq_puts(m, "DP:\n");
+			break;
+		default:
+			seq_printf(m, "Other encoder (id=%d).\n",
+						intel_encoder->type);
+			return;
+		}
+	}
+
+	if (dev_priv->vbt.drrs_type == STATIC_DRRS_SUPPORT)
+		seq_puts(m, "\tVBT: DRRS_type: Static");
+	else if (dev_priv->vbt.drrs_type == SEAMLESS_DRRS_SUPPORT)
+		seq_puts(m, "\tVBT: DRRS_type: Seamless");
+	else if (dev_priv->vbt.drrs_type == DRRS_NOT_SUPPORTED)
+		seq_puts(m, "\tVBT: DRRS_type: None");
+	else
+		seq_puts(m, "\tVBT: DRRS_type: FIXME: Unrecognized Value");
+
+	seq_puts(m, "\n\n");
+
+	if (intel_crtc->config->has_drrs) {
+		struct intel_panel *panel;
+
+		panel = &drrs->dp->attached_connector->panel;
+		/* DRRS Supported */
+		seq_puts(m, "\tDRRS Supported: Yes\n");
+		seq_printf(m, "\t\tBusy_frontbuffer_bits: 0x%X",
+					drrs->busy_frontbuffer_bits);
+
+		seq_puts(m, "\n\t\t");
+		work_status = work_busy(&drrs->work.work);
+		if (drrs->busy_frontbuffer_bits) {
+			seq_puts(m, "Front buffer: Busy.\n");
+			seq_puts(m, "\t\tIdleness DRRS: Disabled");
+		} else {
+			seq_puts(m, "Front buffer: Idle");
+			seq_puts(m, "\n\t\t");
+			if (drrs->refresh_rate_type == DRRS_HIGH_RR) {
+				if (work_status)
+					seq_puts(m, "Idleness DRRS: Enabled");
+				else
+					seq_puts(m, "Idleness DRRS: Disabled");
+			} else if (drrs->refresh_rate_type == DRRS_LOW_RR) {
+				seq_puts(m, "Idleness DRRS: Enabled");
+			}
+		}
+
+		seq_puts(m, "\n\t\t");
+		if (drrs->refresh_rate_type == DRRS_HIGH_RR) {
+			seq_puts(m, "DRRS_State: DRRS_HIGH_RR\n");
+			vrefresh = panel->fixed_mode->vrefresh;
+		} else if (drrs->refresh_rate_type == DRRS_LOW_RR) {
+			seq_puts(m, "DRRS_State: DRRS_LOW_RR\n");
+			vrefresh = panel->downclock_mode->vrefresh;
+		} else {
+			seq_printf(m, "DRRS_State: Unknown(%d)\n",
+						drrs->refresh_rate_type);
+			return;
+		}
+		seq_printf(m, "\t\tVrefresh: %d", vrefresh);
+
+	} else {
+		/* DRRS not supported. Print the VBT parameter*/
+		seq_puts(m, "\tDRRS Supported : No");
+	}
+	seq_puts(m, "\n");
+}
+
+static int i915_drrs_status(struct seq_file *m, void *unused)
+{
+	struct drm_info_node *node = m->private;
+	struct drm_device *dev = node->minor->dev;
+	struct intel_crtc *intel_crtc;
+	int active_crtc_cnt = 0;
+
+	for_each_intel_crtc(dev, intel_crtc) {
+		if (intel_crtc->active) {
+			active_crtc_cnt++;
+			seq_printf(m, "\nCRTC %d:  ", active_crtc_cnt);
+
+			drrs_status_per_crtc(m, dev, intel_crtc);
+		}
+	}
+
+	if (!active_crtc_cnt)
+		seq_puts(m, "No active crtc found\n");
+
+	return 0;
+}
+
 struct pipe_crc_info {
 	const char *name;
 	struct drm_device *dev;
@@ -4483,6 +4595,7 @@  static const struct drm_info_list i915_debugfs_list[] = {
 	{"i915_dp_mst_info", i915_dp_mst_info, 0},
 	{"i915_wa_registers", i915_wa_registers, 0},
 	{"i915_ddb_info", i915_ddb_info, 0},
+	{"i915_drrs_status", i915_drrs_status, 0},
 };
 #define I915_DEBUGFS_ENTRIES ARRAY_SIZE(i915_debugfs_list)