| Message ID | 1424974839-16769-3-git-send-email-damien.lespiau@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
Tested-By: PRC QA PRTS (Patch Regression Test System Contact: shuang.he@intel.com)
Task id: 5844
-------------------------------------Summary-------------------------------------
Platform Delta drm-intel-nightly Series Applied
PNV 282/282 282/282
ILK 308/308 308/308
SNB 326/326 326/326
IVB 379/379 379/379
BYT 294/294 294/294
HSW 387/387 387/387
BDW -1 316/316 315/316
-------------------------------------Detailed-------------------------------------
Platform Test drm-intel-nightly Series Applied
*BDW igt_gem_gtt_hog PASS(15) DMESG_WARN(1)PASS(1)
Note: You need to pay more attention to line start with '*'
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> On Thu, Feb 26, 2015 at 10:20 AM, Damien Lespiau <damien.lespiau@intel.com> wrote: > Signed-off-by: Damien Lespiau <damien.lespiau@intel.com> > --- > drivers/gpu/drm/i915/i915_reg.h | 1 + > drivers/gpu/drm/i915/intel_pm.c | 4 ++++ > 2 files changed, 5 insertions(+) > > diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h > index 55143cb..6849b74 100644 > --- a/drivers/gpu/drm/i915/i915_reg.h > +++ b/drivers/gpu/drm/i915/i915_reg.h > @@ -6056,6 +6056,7 @@ enum skl_disp_power_wells { > # define GEN6_CSUNIT_CLOCK_GATE_DISABLE (1 << 7) > > #define GEN6_UCGCTL2 0x9404 > +# define GEN6_VFUNIT_CLOCK_GATE_DISABLE (1 << 31) > # define GEN7_VDSUNIT_CLOCK_GATE_DISABLE (1 << 30) > # define GEN7_TDLUNIT_CLOCK_GATE_DISABLE (1 << 22) > # define GEN6_RCZUNIT_CLOCK_GATE_DISABLE (1 << 13) > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c > index f11e487..601f43c 100644 > --- a/drivers/gpu/drm/i915/intel_pm.c > +++ b/drivers/gpu/drm/i915/intel_pm.c > @@ -75,6 +75,10 @@ static void skl_init_clock_gating(struct drm_device *dev) > I915_WRITE(GEN8_UCGCTL6, I915_READ(GEN8_UCGCTL6) | > GEN8_GAPSUNIT_CLOCK_GATE_DISABLE | > GEN8_SDEUNIT_CLOCK_GATE_DISABLE); > + > + /* WaDisableVFUnitClockGating:skl */ > + I915_WRITE(GEN6_UCGCTL2, I915_READ(GEN6_UCGCTL2) | > + GEN6_VFUNIT_CLOCK_GATE_DISABLE); > } > > if (INTEL_REVID(dev) <= SKL_REVID_D0) { > -- > 1.8.3.1 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 55143cb..6849b74 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -6056,6 +6056,7 @@ enum skl_disp_power_wells { # define GEN6_CSUNIT_CLOCK_GATE_DISABLE (1 << 7) #define GEN6_UCGCTL2 0x9404 +# define GEN6_VFUNIT_CLOCK_GATE_DISABLE (1 << 31) # define GEN7_VDSUNIT_CLOCK_GATE_DISABLE (1 << 30) # define GEN7_TDLUNIT_CLOCK_GATE_DISABLE (1 << 22) # define GEN6_RCZUNIT_CLOCK_GATE_DISABLE (1 << 13) diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index f11e487..601f43c 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -75,6 +75,10 @@ static void skl_init_clock_gating(struct drm_device *dev) I915_WRITE(GEN8_UCGCTL6, I915_READ(GEN8_UCGCTL6) | GEN8_GAPSUNIT_CLOCK_GATE_DISABLE | GEN8_SDEUNIT_CLOCK_GATE_DISABLE); + + /* WaDisableVFUnitClockGating:skl */ + I915_WRITE(GEN6_UCGCTL2, I915_READ(GEN6_UCGCTL2) | + GEN6_VFUNIT_CLOCK_GATE_DISABLE); } if (INTEL_REVID(dev) <= SKL_REVID_D0) {
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com> --- drivers/gpu/drm/i915/i915_reg.h | 1 + drivers/gpu/drm/i915/intel_pm.c | 4 ++++ 2 files changed, 5 insertions(+)