From patchwork Tue Mar 3 06:41:46 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ramalingam C X-Patchwork-Id: 5920311 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id DE2B3BF440 for ; Tue, 3 Mar 2015 06:47:02 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 1C4D32028D for ; Tue, 3 Mar 2015 06:47:02 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 1CBB02026F for ; Tue, 3 Mar 2015 06:47:01 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id E58B06E0C5; Mon, 2 Mar 2015 22:46:59 -0800 (PST) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by gabe.freedesktop.org (Postfix) with ESMTP id 8B1FD6E0C5 for ; Mon, 2 Mar 2015 22:46:58 -0800 (PST) Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by orsmga101.jf.intel.com with ESMTP; 02 Mar 2015 22:46:58 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.09,680,1418112000"; d="scan'208";a="461715165" Received: from ramaling-desktop.iind.intel.com ([10.223.26.95]) by FMSMGA003.fm.intel.com with ESMTP; 02 Mar 2015 22:40:45 -0800 From: Ramalingam C To: intel-gfx@lists.freedesktop.org, rodrigo.vivi@intel.com, daniel@ffwll.ch Date: Tue, 3 Mar 2015 12:11:46 +0530 Message-Id: <1425364906-31769-1-git-send-email-ramalingam.c@intel.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <54F2CCA6.9070606@intel.com> References: <54F2CCA6.9070606@intel.com> Cc: paulo.r.zanoni@intel.com Subject: [Intel-gfx] [PATCH] drm/i915: Fixing mutex deadlock window at eDP DRRS X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP In invalidate and flush functions of eDP DRRS, if deferred downclock work starts execution at a time window between acquiring the drrs mutex and cancellation of the deferred work (intel_edp_drrs_downclock_work), then deferred work will find drrs mutex locked and wait for the same. Meanwhile the function that acquired mutex drrs invalidate/flush will wait for the completion of the deferred work before releasing the mutex. Thats a deadlock. To avoid such deadlock scenario, this change cancels the deferred work before acquiring the mutex at invalidate and flush functions. Signed-off-by: Ramalingam C Reviewed-by: Rodrigo Vivi --- drivers/gpu/drm/i915/intel_dp.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index d1141d3..0a57763 100644 --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c @@ -4966,12 +4966,13 @@ void intel_edp_drrs_invalidate(struct drm_device *dev, if (!dev_priv->drrs.dp) return; + cancel_delayed_work_sync(&dev_priv->drrs.work); + mutex_lock(&dev_priv->drrs.mutex); crtc = dp_to_dig_port(dev_priv->drrs.dp)->base.base.crtc; pipe = to_intel_crtc(crtc)->pipe; if (dev_priv->drrs.refresh_rate_type == DRRS_LOW_RR) { - cancel_delayed_work_sync(&dev_priv->drrs.work); intel_dp_set_drrs_state(dev_priv->dev, dev_priv->drrs.dp->attached_connector->panel. fixed_mode->vrefresh); @@ -5004,13 +5005,13 @@ void intel_edp_drrs_flush(struct drm_device *dev, if (!dev_priv->drrs.dp) return; + cancel_delayed_work_sync(&dev_priv->drrs.work); + mutex_lock(&dev_priv->drrs.mutex); crtc = dp_to_dig_port(dev_priv->drrs.dp)->base.base.crtc; pipe = to_intel_crtc(crtc)->pipe; dev_priv->drrs.busy_frontbuffer_bits &= ~frontbuffer_bits; - cancel_delayed_work_sync(&dev_priv->drrs.work); - if (dev_priv->drrs.refresh_rate_type != DRRS_LOW_RR && !dev_priv->drrs.busy_frontbuffer_bits) schedule_delayed_work(&dev_priv->drrs.work,