From patchwork Fri Mar 6 18:50:49 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Lespiau, Damien" X-Patchwork-Id: 5957251 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 568099F36A for ; Fri, 6 Mar 2015 18:51:02 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 8DB0320212 for ; Fri, 6 Mar 2015 18:51:01 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id B2149201CD for ; Fri, 6 Mar 2015 18:51:00 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 397B16E37F; Fri, 6 Mar 2015 10:51:00 -0800 (PST) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by gabe.freedesktop.org (Postfix) with ESMTP id E0F726E37F for ; Fri, 6 Mar 2015 10:50:58 -0800 (PST) Received: from orsmga003.jf.intel.com ([10.7.209.27]) by orsmga102.jf.intel.com with ESMTP; 06 Mar 2015 10:49:26 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.11,354,1422950400"; d="scan'208";a="537184683" Received: from aveniero-mobl2.ger.corp.intel.com (HELO strange.ger.corp.intel.com) ([10.252.19.180]) by orsmga003.jf.intel.com with ESMTP; 06 Mar 2015 10:50:41 -0800 From: Damien Lespiau To: intel-gfx@lists.freedesktop.org Date: Fri, 6 Mar 2015 18:50:49 +0000 Message-Id: <1425667853-5717-3-git-send-email-damien.lespiau@intel.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1425667853-5717-1-git-send-email-damien.lespiau@intel.com> References: <1425667853-5717-1-git-send-email-damien.lespiau@intel.com> Cc: paulo.r.zanoni@intel.com Subject: [Intel-gfx] [PATCH 2/6] drm/i915/skl: Introduce enable_requested and is_enabled in the power well code X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Just like what we do for HSW/BDW, having those variables makes it a bit easier to parse the code. Suggested-by: Paulo Zanoni Signed-off-by: Damien Lespiau --- drivers/gpu/drm/i915/intel_runtime_pm.c | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c index 35e0cb6..8f34d38 100644 --- a/drivers/gpu/drm/i915/intel_runtime_pm.c +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c @@ -294,7 +294,7 @@ static void skl_set_power_well(struct drm_i915_private *dev_priv, { uint32_t tmp, fuse_status; uint32_t req_mask, state_mask; - bool check_fuse_status = false; + bool is_enabled, enable_requested, check_fuse_status = false; tmp = I915_READ(HSW_PWR_WELL_DRIVER); fuse_status = I915_READ(SKL_FUSE_STATUS); @@ -325,15 +325,17 @@ static void skl_set_power_well(struct drm_i915_private *dev_priv, } req_mask = SKL_POWER_WELL_REQ(power_well->data); + enable_requested = tmp & req_mask; state_mask = SKL_POWER_WELL_STATE(power_well->data); + is_enabled = tmp & state_mask; if (enable) { - if (!(tmp & req_mask)) { + if (!enable_requested) { I915_WRITE(HSW_PWR_WELL_DRIVER, tmp | req_mask); DRM_DEBUG_KMS("Enabling %s\n", power_well->name); } - if (!(tmp & state_mask)) { + if (!is_enabled) { if (wait_for((I915_READ(HSW_PWR_WELL_DRIVER) & state_mask), 1)) DRM_ERROR("%s enable timeout\n", @@ -341,7 +343,7 @@ static void skl_set_power_well(struct drm_i915_private *dev_priv, check_fuse_status = true; } } else { - if (tmp & req_mask) { + if (enable_requested) { I915_WRITE(HSW_PWR_WELL_DRIVER, tmp & ~req_mask); POSTING_READ(HSW_PWR_WELL_DRIVER); DRM_DEBUG_KMS("Disabling %s\n", power_well->name);