From patchwork Fri Mar 13 09:48:59 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ander Conselvan de Oliveira X-Patchwork-Id: 6003771 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 07B5EBF910 for ; Fri, 13 Mar 2015 09:49:40 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 290AA202B8 for ; Fri, 13 Mar 2015 09:49:39 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 4B8E0202AE for ; Fri, 13 Mar 2015 09:49:38 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id A4D7E6EAAA; Fri, 13 Mar 2015 02:49:37 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by gabe.freedesktop.org (Postfix) with ESMTP id 4CF806EAA5 for ; Fri, 13 Mar 2015 02:49:36 -0700 (PDT) Received: from orsmga003.jf.intel.com ([10.7.209.27]) by fmsmga101.fm.intel.com with ESMTP; 13 Mar 2015 02:49:36 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.11,393,1422950400"; d="scan'208";a="540397402" Received: from linux.intel.com ([10.23.219.25]) by orsmga003.jf.intel.com with ESMTP; 13 Mar 2015 02:48:50 -0700 Received: from localhost (aconselv-mobl3.ger.corp.intel.com [10.237.72.157]) by linux.intel.com (Postfix) with ESMTP id 31CE7300001; Fri, 13 Mar 2015 02:49:18 -0700 (PDT) From: Ander Conselvan de Oliveira To: intel-gfx@lists.freedesktop.org Date: Fri, 13 Mar 2015 11:48:59 +0200 Message-Id: <1426240142-24538-17-git-send-email-ander.conselvan.de.oliveira@intel.com> X-Mailer: git-send-email 2.1.0 In-Reply-To: <1426240142-24538-1-git-send-email-ander.conselvan.de.oliveira@intel.com> References: <1426240142-24538-1-git-send-email-ander.conselvan.de.oliveira@intel.com> Cc: Ander Conselvan de Oliveira Subject: [Intel-gfx] [PATCH 16/19] drm/i915: Check lane sharing between pipes B & C using atomic state X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Makes that code atomic ready. Signed-off-by: Ander Conselvan de Oliveira --- drivers/gpu/drm/i915/intel_display.c | 49 ++++++++++++++++++++++++++++++------ 1 file changed, 42 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index e720a48..8c97186 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -5537,13 +5537,20 @@ bool intel_connector_get_hw_state(struct intel_connector *connector) return encoder->get_hw_state(encoder, &pipe); } -static int pipe_required_fdi_lanes(struct drm_device *dev, enum pipe pipe) +static int pipe_required_fdi_lanes(struct drm_atomic_state *state, + enum pipe pipe) { struct intel_crtc *crtc = - to_intel_crtc(intel_get_crtc_for_pipe(dev, pipe)); + to_intel_crtc(intel_get_crtc_for_pipe(state->dev, pipe)); + struct intel_crtc_state *crtc_state; + + crtc_state = intel_atomic_get_crtc_state(state, crtc); + if (WARN_ON(IS_ERR(crtc_state))) { + /* Cause modeset to fail due to excess lanes. */ + return 5; + } - if (crtc->base.state->enable && - crtc->config->has_pch_encoder) + if (crtc_state->base.enable && crtc_state->has_pch_encoder) return crtc->config->fdi_lanes; return 0; @@ -5552,6 +5559,8 @@ static int pipe_required_fdi_lanes(struct drm_device *dev, enum pipe pipe) static bool ironlake_check_fdi_lanes(struct drm_device *dev, enum pipe pipe, struct intel_crtc_state *pipe_config) { + struct drm_atomic_state *state = pipe_config->base.state; + DRM_DEBUG_KMS("checking fdi config on pipe %c, lanes %i\n", pipe_name(pipe), pipe_config->fdi_lanes); if (pipe_config->fdi_lanes > 4) { @@ -5579,7 +5588,7 @@ static bool ironlake_check_fdi_lanes(struct drm_device *dev, enum pipe pipe, return true; case PIPE_B: if (pipe_config->fdi_lanes > 2 && - pipe_required_fdi_lanes(dev, PIPE_C) > 0) { + pipe_required_fdi_lanes(state, PIPE_C) > 0) { DRM_DEBUG_KMS("invalid shared fdi lane config on pipe %c: %i lanes\n", pipe_name(pipe), pipe_config->fdi_lanes); return false; @@ -5591,7 +5600,7 @@ static bool ironlake_check_fdi_lanes(struct drm_device *dev, enum pipe pipe, pipe_name(pipe), pipe_config->fdi_lanes); return false; } - if (pipe_required_fdi_lanes(dev, PIPE_B) > 2) { + if (pipe_required_fdi_lanes(state, PIPE_B) > 2) { DRM_DEBUG_KMS("fdi link B uses too many lanes to enable link C\n"); return false; } @@ -5601,15 +5610,41 @@ static bool ironlake_check_fdi_lanes(struct drm_device *dev, enum pipe pipe, } } +static int add_pipe_b_c_to_state(struct drm_atomic_state *state) +{ + struct intel_crtc *pipe_B = + to_intel_crtc(intel_get_crtc_for_pipe(state->dev, PIPE_B)); + struct intel_crtc *pipe_C = + to_intel_crtc(intel_get_crtc_for_pipe(state->dev, PIPE_C)); + struct intel_crtc_state *crtc_state; + + crtc_state = intel_atomic_get_crtc_state(state, pipe_B); + if (IS_ERR(crtc_state)) + return PTR_ERR(crtc_state); + + crtc_state = intel_atomic_get_crtc_state(state, pipe_C); + if (IS_ERR(crtc_state)) + return PTR_ERR(crtc_state); + + return 0; +} + #define RETRY 1 static int ironlake_fdi_compute_config(struct intel_crtc *intel_crtc, struct intel_crtc_state *pipe_config) { struct drm_device *dev = intel_crtc->base.dev; struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode; - int lane, link_bw, fdi_dotclock; + int lane, link_bw, fdi_dotclock, ret; bool setup_ok, needs_recompute = false; + if (IS_IVYBRIDGE(dev) && + (intel_crtc->pipe == PIPE_B || intel_crtc->pipe == PIPE_C)) { + ret = add_pipe_b_c_to_state(pipe_config->base.state); + if (ret < 0) + return ret; + } + retry: /* FDI is a binary signal running at ~2.7GHz, encoding * each output octet as 10 bits. The actual frequency