From patchwork Thu Apr 9 14:34:06 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thierry Reding X-Patchwork-Id: 6187981 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 6CAE6BF4A6 for ; Thu, 9 Apr 2015 14:34:21 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 746D52037B for ; Thu, 9 Apr 2015 14:34:20 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 86B4A2035B for ; Thu, 9 Apr 2015 14:34:19 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 9E8C5720F4; Thu, 9 Apr 2015 07:34:18 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail-wg0-f50.google.com (mail-wg0-f50.google.com [74.125.82.50]) by gabe.freedesktop.org (Postfix) with ESMTP id 48C45720F2; Thu, 9 Apr 2015 07:34:15 -0700 (PDT) Received: by wgso17 with SMTP id o17so10432586wgs.1; Thu, 09 Apr 2015 07:34:14 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=xp6J+v6VKpHyuZDaHf8WMrv3upzdj6Ls5Zedf08G4XI=; b=fGDyysaDAayOOzOWNPBQy49eH7nfD+iUEV8xAbDrVl8Y0R3WzFgBmHttXS4bmhJNnA nM9gCxMqRdohG8ZLnocZbjdaR3GyHSkrWi6CRoLdzDA1HzVsrdN1swMtzBCFMZOfS4uv 2u6K/biUF9vQdj7nDu7z6PV9v5pH1Vup47xB2Jgs4TqgpNRA2R6wRprWPE2qfj3WdEHV pHgeI9Cu/qwkpMQpXVjv5Mxk8+md3CBo+VTwleLkpWyQxQGFzJJ0PSOJDpAp7TnHdsWW BPaK6/3xYSTrlqCgRkhyE7DNwdCsLNR5t3cwEtX2oRpdl8IXYgt4+5t7qGEi0B218iab NB0Q== X-Received: by 10.180.97.66 with SMTP id dy2mr6679424wib.77.1428590054444; Thu, 09 Apr 2015 07:34:14 -0700 (PDT) Received: from localhost (port-21116.pppoe.wtnet.de. [46.59.144.37]) by mx.google.com with ESMTPSA id a6sm20425640wiy.17.2015.04.09.07.34.13 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 09 Apr 2015 07:34:13 -0700 (PDT) From: Thierry Reding To: dri-devel@lists.freedesktop.org Date: Thu, 9 Apr 2015 16:34:06 +0200 Message-Id: <1428590049-20357-3-git-send-email-thierry.reding@gmail.com> X-Mailer: git-send-email 2.3.2 In-Reply-To: <1428590049-20357-1-git-send-email-thierry.reding@gmail.com> References: <1428590049-20357-1-git-send-email-thierry.reding@gmail.com> Cc: Arnd Bergmann , David Airlie , Catalin Marinas , intel-gfx@lists.freedesktop.org, Will Deacon , Russell King , linux-arm-kernel@lists.infradead.org Subject: [Intel-gfx] [PATCH 3/6] drm/cache: Implement drm_clflush_*() for 64-bit ARM X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-4.1 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_MED, T_DKIM_INVALID, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Thierry Reding Add implementations for drm_clflush_*() on 64-bit ARM. This shares a lot of code with the 32-bit ARM implementation. Cc: Catalin Marinas Cc: Will Deacon Signed-off-by: Thierry Reding --- drivers/gpu/drm/drm_cache.c | 15 +++++++++++++-- 1 file changed, 13 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/drm_cache.c b/drivers/gpu/drm/drm_cache.c index 200d86c3d72d..0c3072b4cdc9 100644 --- a/drivers/gpu/drm/drm_cache.c +++ b/drivers/gpu/drm/drm_cache.c @@ -102,6 +102,17 @@ static void drm_clflush_page(struct page *page) } #endif +#if defined(CONFIG_ARM64) +static void drm_clflush_page(struct page *page) +{ + void *virt; + + virt = kmap_atomic(page); + __dma_flush_range(virt, virt + PAGE_SIZE); + kunmap_atomic(virt); +} +#endif + void drm_clflush_pages(struct page *pages[], unsigned long num_pages) { @@ -129,7 +140,7 @@ drm_clflush_pages(struct page *pages[], unsigned long num_pages) (unsigned long)page_virtual + PAGE_SIZE); kunmap_atomic(page_virtual); } -#elif defined(CONFIG_ARM) +#elif defined(CONFIG_ARM) || defined(CONFIG_ARM64) unsigned long i; for (i = 0; i < num_pages; i++) @@ -158,7 +169,7 @@ drm_clflush_sg(struct sg_table *st) if (wbinvd_on_all_cpus()) printk(KERN_ERR "Timed out waiting for cache flush.\n"); -#elif defined(CONFIG_ARM) +#elif defined(CONFIG_ARM) || defined(CONFIG_ARM64) struct sg_page_iter sg_iter; for_each_sg_page(st->sgl, &sg_iter, st->nents, 0)