From patchwork Thu Apr 9 14:34:07 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thierry Reding X-Patchwork-Id: 6187971 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 7CAA6BF4A7 for ; Thu, 9 Apr 2015 14:34:21 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 988112037E for ; Thu, 9 Apr 2015 14:34:20 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id AC07820376 for ; Thu, 9 Apr 2015 14:34:19 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id CFA05720F6; Thu, 9 Apr 2015 07:34:18 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail-wi0-f182.google.com (mail-wi0-f182.google.com [209.85.212.182]) by gabe.freedesktop.org (Postfix) with ESMTP id 542BB720F4; Thu, 9 Apr 2015 07:34:17 -0700 (PDT) Received: by wiun10 with SMTP id n10so100574230wiu.1; Thu, 09 Apr 2015 07:34:16 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=EW1h5n/nOskB0VV4QC09ROvEby01dWK+2wj2zlDbuxs=; b=dGXgXTcTY1YHb7l2s4Mesq9uSqBeub6DxOXUTAvABupTrN7ig/0623SU6gxsJBANCZ hJCoRY9ke73s4exLi/2uh7qM+vpLCICgLWR9f8+8ODoAH6d+QVa4JYzklOZ/F78S+gal 2t+yhMbbgRMMdfIj0MORxbex26R4VpdOFD1SryB3O3S7eL4PTjG/FGUt/4Ukesd2F+lX eWLB8uEVstQtTnSV4N+uhax3jGP3qPY8fT1FpTixRVTrowoz0ixQkzyhJsGvIg0d5+m+ U/QN6Z8+J+vjkse+BpIAfPKgewHHRivQnLtLhPanfC0xWN/AbvC7xWSP5pLbVDTz0OdV XpgA== X-Received: by 10.180.91.77 with SMTP id cc13mr6756028wib.88.1428590056386; Thu, 09 Apr 2015 07:34:16 -0700 (PDT) Received: from localhost (port-21116.pppoe.wtnet.de. [46.59.144.37]) by mx.google.com with ESMTPSA id z13sm20366172wjr.44.2015.04.09.07.34.15 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 09 Apr 2015 07:34:15 -0700 (PDT) From: Thierry Reding To: dri-devel@lists.freedesktop.org Date: Thu, 9 Apr 2015 16:34:07 +0200 Message-Id: <1428590049-20357-4-git-send-email-thierry.reding@gmail.com> X-Mailer: git-send-email 2.3.2 In-Reply-To: <1428590049-20357-1-git-send-email-thierry.reding@gmail.com> References: <1428590049-20357-1-git-send-email-thierry.reding@gmail.com> Cc: Arnd Bergmann , David Airlie , Catalin Marinas , intel-gfx@lists.freedesktop.org, Will Deacon , Russell King , linux-arm-kernel@lists.infradead.org Subject: [Intel-gfx] [PATCH 4/6] drm/tegra: gem: Use drm_clflush_*() functions X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-4.1 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_MED, T_DKIM_INVALID, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Thierry Reding Instead of going through the DMA mapping API for cache maintenance, use the drm_clflush_*() family of functions to achieve the same effect. Signed-off-by: Thierry Reding --- drivers/gpu/drm/tegra/Kconfig | 1 + drivers/gpu/drm/tegra/gem.c | 42 +++++++++++------------------------------- 2 files changed, 12 insertions(+), 31 deletions(-) diff --git a/drivers/gpu/drm/tegra/Kconfig b/drivers/gpu/drm/tegra/Kconfig index 74d9d621453d..4901f20f99a1 100644 --- a/drivers/gpu/drm/tegra/Kconfig +++ b/drivers/gpu/drm/tegra/Kconfig @@ -4,6 +4,7 @@ config DRM_TEGRA depends on COMMON_CLK depends on DRM depends on RESET_CONTROLLER + select DRM_CACHE select DRM_KMS_HELPER select DRM_MIPI_DSI select DRM_PANEL diff --git a/drivers/gpu/drm/tegra/gem.c b/drivers/gpu/drm/tegra/gem.c index 499f86739786..11e97a46e63d 100644 --- a/drivers/gpu/drm/tegra/gem.c +++ b/drivers/gpu/drm/tegra/gem.c @@ -203,48 +203,28 @@ static void tegra_bo_free(struct drm_device *drm, struct tegra_bo *bo) static int tegra_bo_get_pages(struct drm_device *drm, struct tegra_bo *bo) { - struct scatterlist *s; - struct sg_table *sgt; - unsigned int i; - bo->pages = drm_gem_get_pages(&bo->gem); if (IS_ERR(bo->pages)) return PTR_ERR(bo->pages); bo->num_pages = bo->gem.size >> PAGE_SHIFT; - sgt = drm_prime_pages_to_sg(bo->pages, bo->num_pages); - if (IS_ERR(sgt)) - goto put_pages; + bo->sgt = drm_prime_pages_to_sg(bo->pages, bo->num_pages); + if (IS_ERR(bo->sgt)) { + drm_gem_put_pages(&bo->gem, bo->pages, false, false); + return PTR_ERR(bo->sgt); + } -#ifndef CONFIG_ARM64 /* - * Fake up the SG table so that dma_map_sg() can be used to flush the - * pages associated with it. Note that this relies on the fact that - * the DMA API doesn't hook into IOMMU on Tegra, therefore mapping is - * only cache maintenance. - * - * TODO: Replace this by drm_clflash_sg() once it can be implemented - * without relying on symbols that are not exported. + * Pages allocated by shmemfs are marked dirty but not flushed on + * ARMv7 and ARMv8. Since this memory is used to back framebuffers, + * however, they must be forced out of caches to avoid corruption + * on screen later on as the result of dirty cache-lines being + * flushed. */ - for_each_sg(sgt->sgl, s, sgt->nents, i) - sg_dma_address(s) = sg_phys(s); - - if (dma_map_sg(drm->dev, sgt->sgl, sgt->nents, DMA_TO_DEVICE) == 0) - goto release_sgt; -#endif - - bo->sgt = sgt; + drm_clflush_sg(bo->sgt); return 0; - -release_sgt: - sg_free_table(sgt); - kfree(sgt); - sgt = ERR_PTR(-ENOMEM); -put_pages: - drm_gem_put_pages(&bo->gem, bo->pages, false, false); - return PTR_ERR(sgt); } static int tegra_bo_alloc(struct drm_device *drm, struct tegra_bo *bo)