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[RFC,06/10] drm/i915/config: Add init-time configuration of eDP PPS delays.

Message ID 1428958271-15653-7-git-send-email-bob.j.paauwe@intel.com (mailing list archive)
State New, archived
Headers show

Commit Message

Paauwe, Bob J April 13, 2015, 8:51 p.m. UTC 
Allow the configuration file to overide the various panel power
sequence delay values.

Signed-off-by: Bob Paauwe <bob.j.paauwe@intel.com>
---
 drivers/gpu/drm/i915/intel_dp.c | 14 ++++++++++++++
 1 file changed, 14 insertions(+)
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Patch

diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index b05ff6d..7defb3a 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -5565,6 +5565,20 @@  intel_dp_init_connector(struct intel_digital_port *intel_dig_port,
 		else
 			intel_dp_init_panel_power_sequencer(dev, intel_dp);
 		pps_unlock(intel_dp);
+
+		/* Check for config overides for PPS delays */
+#define CONFIG_PANEL_POWER_DELAY(delay_name)  \
+	intel_config_get_integer(dev_priv, CFG_CONNECTOR, \
+				 intel_dp->attached_connector->base.name, \
+				 #delay_name, \
+				 (uint32_t *)&intel_dp->pps_delays.delay_name)
+
+		CONFIG_PANEL_POWER_DELAY(t1_t3);
+		CONFIG_PANEL_POWER_DELAY(t8);
+		CONFIG_PANEL_POWER_DELAY(t9);
+		CONFIG_PANEL_POWER_DELAY(t10);
+		CONFIG_PANEL_POWER_DELAY(t11_t12);
+#undef CONFIG_PANEL_POWER_DELAY
 	}
 
 	intel_dp_aux_init(intel_dp, intel_connector);