From patchwork Fri May 1 03:43:15 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chandra Konduru X-Patchwork-Id: 6308061 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 15D88BEEE1 for ; Fri, 1 May 2015 03:44:31 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 227BC201CD for ; Fri, 1 May 2015 03:44:30 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 332F920212 for ; Fri, 1 May 2015 03:44:28 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id A38546E8C9; Thu, 30 Apr 2015 20:44:27 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by gabe.freedesktop.org (Postfix) with ESMTP id 41EEF6E8BB for ; Thu, 30 Apr 2015 20:44:24 -0700 (PDT) Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by fmsmga103.fm.intel.com with ESMTP; 30 Apr 2015 20:44:24 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.13,348,1427785200"; d="scan'208";a="487969341" Received: from cmkondur-desk2.fm.intel.com ([10.19.123.59]) by FMSMGA003.fm.intel.com with ESMTP; 30 Apr 2015 20:44:24 -0700 From: Chandra Konduru To: intel-gfx@lists.freedesktop.org Date: Thu, 30 Apr 2015 20:43:15 -0700 Message-Id: <1430451795-9657-12-git-send-email-chandra.konduru@intel.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1430451795-9657-1-git-send-email-chandra.konduru@intel.com> References: <1430451795-9657-1-git-send-email-chandra.konduru@intel.com> Cc: daniel.vetter@intel.com, ville.syrjala@intel.com Subject: [Intel-gfx] [PATCH 11/11] drm/i915: Add NV12 to sprite plane programming. X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This patch is adding NV12 support to skylake sprite plane programming. It is covering linear/X/Y/Yf tiling formats for 0 and 180 rotations. For 90/270 rotation, Y and UV subplanes should be treated as separate surfaces and GTT remapping for rotation should be done separately for each subplane. Once GEM adds support for seperate remappings for two subplanes, 90/270 support to be added to plane programming. Signed-off-by: Chandra Konduru Testcase: igt/kms_nv12 --- drivers/gpu/drm/i915/intel_sprite.c | 31 +++++++++++++++++++++++++++++-- 1 file changed, 29 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c index aa2998f..2a03905 100644 --- a/drivers/gpu/drm/i915/intel_sprite.c +++ b/drivers/gpu/drm/i915/intel_sprite.c @@ -201,6 +201,8 @@ skl_update_plane(struct drm_plane *drm_plane, struct drm_crtc *crtc, int x_offset, y_offset; struct intel_crtc_state *crtc_state = to_intel_crtc(crtc)->config; int scaler_id; + u32 aux_dist = 0, aux_x_offset = 0, aux_y_offset = 0, aux_stride = 0; + u32 tile_row_adjustment = 0; plane_ctl = PLANE_CTL_ENABLE | PLANE_CTL_PIPE_CSC_ENABLE; @@ -247,24 +249,48 @@ skl_update_plane(struct drm_plane *drm_plane, struct drm_crtc *crtc, plane_size = (src_w << 16) | src_h; x_offset = stride * tile_height - y - (src_h + 1); y_offset = x; + + /* + * TBD: For NV12 90/270 rotation, Y and UV subplanes should + * be treated as separate surfaces and GTT remapping for + * rotation should be done separately for each subplane. + * Enable support once seperate remappings are available. + */ } else { stride = fb->pitches[0] / stride_div; plane_size = (src_h << 16) | src_w; x_offset = x; y_offset = y; + tile_height = PAGE_SIZE / stride_div; + + if (fb->pixel_format == DRM_FORMAT_NV12) { + int height_in_mem = (fb->offsets[1]/fb->pitches[0]); + /* + * If UV starts from middle of a page, then UV start should + * be programmed to beginning of that page. And offset into that + * page to be programmed into y-offset + */ + tile_row_adjustment = height_in_mem % tile_height; + aux_dist = fb->pitches[0] * (height_in_mem - tile_row_adjustment); + aux_x_offset = DIV_ROUND_UP(x, 2); + aux_y_offset = DIV_ROUND_UP(y, 2) + tile_row_adjustment; + /* For tile-Yf, uv-subplane tile width is 2x of Y-subplane */ + aux_stride = fb->modifier[0] == I915_FORMAT_MOD_Yf_TILED ? + stride / 2 : stride; + } } plane_offset = y_offset << 16 | x_offset; I915_WRITE(PLANE_OFFSET(pipe, plane), plane_offset); I915_WRITE(PLANE_STRIDE(pipe, plane), stride); I915_WRITE(PLANE_SIZE(pipe, plane), plane_size); + I915_WRITE(PLANE_AUX_DIST(pipe, plane), aux_dist | aux_stride); + I915_WRITE(PLANE_AUX_OFFSET(pipe, plane), aux_y_offset<<16 | aux_x_offset); /* program plane scaler */ if (scaler_id >= 0) { uint32_t ps_ctrl = 0; - DRM_DEBUG_KMS("plane = %d PS_PLANE_SEL(plane) = 0x%x\n", plane, - PS_PLANE_SEL(plane)); ps_ctrl = PS_SCALER_EN | PS_PLANE_SEL(plane) | crtc_state->scaler_state.scalers[scaler_id].mode; I915_WRITE(SKL_PS_CTRL(pipe, scaler_id), ps_ctrl); @@ -275,6 +301,7 @@ skl_update_plane(struct drm_plane *drm_plane, struct drm_crtc *crtc, I915_WRITE(PLANE_POS(pipe, plane), 0); } else { + WARN_ON(fb->pixel_format == DRM_FORMAT_NV12); I915_WRITE(PLANE_POS(pipe, plane), (crtc_y << 16) | crtc_x); }