Message ID | 1430451795-9657-9-git-send-email-chandra.konduru@intel.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Hi, On 05/01/2015 04:43 AM, Chandra Konduru wrote: > This patch adds NV12 as supported format to > intel_framebuffer_init and performs various checks. > > Signed-off-by: Chandra Konduru <chandra.konduru@intel.com> > Testcase: igt/kms_nv12 > --- > drivers/gpu/drm/i915/intel_display.c | 27 +++++++++++++++++++++++++++ > 1 file changed, 27 insertions(+) > > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c > index d3773d2..6e693c4 100644 > --- a/drivers/gpu/drm/i915/intel_display.c > +++ b/drivers/gpu/drm/i915/intel_display.c > @@ -13953,6 +13953,33 @@ static int intel_framebuffer_init(struct drm_device *dev, > return -EINVAL; > } > break; > + case DRM_FORMAT_NV12: > + if (INTEL_INFO(dev)->gen < 9) { > + DRM_DEBUG("unsupported pixel format: %s\n", > + drm_get_format_name(mode_cmd->pixel_format)); > + return -EINVAL; > + } > + if (!mode_cmd->offsets[1]) { > + DRM_DEBUG("uv start offset not set\n"); > + return -EINVAL; > + } > + if (mode_cmd->pitches[0] != mode_cmd->pitches[1] || > + mode_cmd->handles[0] != mode_cmd->handles[1]) { > + DRM_DEBUG("y and uv subplanes have different parameters\n"); > + return -EINVAL; > + } > + if (mode_cmd->modifier[1] == I915_FORMAT_MOD_Yf_TILED && > + (mode_cmd->offsets[1] & 0xFFF)) { > + DRM_DEBUG("tile-Yf uv offset 0x%x isn't starting on new tile-row\n", > + mode_cmd->offsets[1]); > + return -EINVAL; > + } > + if (mode_cmd->modifier[1] == I915_FORMAT_MOD_Y_TILED && > + ((mode_cmd->offsets[1] % mode_cmd->pitches[1]) % 4)) { > + DRM_DEBUG("tile-Y uv offset 0x%x isn't 4-line aligned\n", > + mode_cmd->offsets[1]); > + } > + break; > default: > DRM_DEBUG("unsupported pixel format: %s\n", > drm_get_format_name(mode_cmd->pixel_format)); > I've noticed a bunch of: [ 566.106745] [drm:drm_mode_addfb2] [FB:58] [ 566.111384] [drm:drm_fb_get_bpp_depth] unsupported pixel format NV12 little-endian (0x3231564e) [ 566.121283] [drm:drm_mode_addfb2] [FB:59] [ 566.125912] [drm:drm_fb_get_bpp_depth] unsupported pixel format NV12 little-endian (0x3231564e) And on investigating, they probably come from drm_helper_mode_fill_fb_struct in intel_framebuffer_init. Result is that fb->depth and fb->bits_per_pixel will be zero, which can't be good. :) Anyway, looks like this needs some additional work to make NV12 really supported. Regards, Tvrtko
On Mon, May 11, 2015 at 11:54:11AM +0100, Tvrtko Ursulin wrote: > > Hi, > > On 05/01/2015 04:43 AM, Chandra Konduru wrote: > > This patch adds NV12 as supported format to > > intel_framebuffer_init and performs various checks. > > > > Signed-off-by: Chandra Konduru <chandra.konduru@intel.com> > > Testcase: igt/kms_nv12 > > --- > > drivers/gpu/drm/i915/intel_display.c | 27 +++++++++++++++++++++++++++ > > 1 file changed, 27 insertions(+) > > > > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c > > index d3773d2..6e693c4 100644 > > --- a/drivers/gpu/drm/i915/intel_display.c > > +++ b/drivers/gpu/drm/i915/intel_display.c > > @@ -13953,6 +13953,33 @@ static int intel_framebuffer_init(struct drm_device *dev, > > return -EINVAL; > > } > > break; > > + case DRM_FORMAT_NV12: > > + if (INTEL_INFO(dev)->gen < 9) { > > + DRM_DEBUG("unsupported pixel format: %s\n", > > + drm_get_format_name(mode_cmd->pixel_format)); > > + return -EINVAL; > > + } > > + if (!mode_cmd->offsets[1]) { > > + DRM_DEBUG("uv start offset not set\n"); > > + return -EINVAL; > > + } > > + if (mode_cmd->pitches[0] != mode_cmd->pitches[1] || > > + mode_cmd->handles[0] != mode_cmd->handles[1]) { > > + DRM_DEBUG("y and uv subplanes have different parameters\n"); > > + return -EINVAL; > > + } > > + if (mode_cmd->modifier[1] == I915_FORMAT_MOD_Yf_TILED && > > + (mode_cmd->offsets[1] & 0xFFF)) { > > + DRM_DEBUG("tile-Yf uv offset 0x%x isn't starting on new tile-row\n", > > + mode_cmd->offsets[1]); > > + return -EINVAL; > > + } > > + if (mode_cmd->modifier[1] == I915_FORMAT_MOD_Y_TILED && > > + ((mode_cmd->offsets[1] % mode_cmd->pitches[1]) % 4)) { > > + DRM_DEBUG("tile-Y uv offset 0x%x isn't 4-line aligned\n", > > + mode_cmd->offsets[1]); > > + } > > + break; > > default: > > DRM_DEBUG("unsupported pixel format: %s\n", > > drm_get_format_name(mode_cmd->pixel_format)); > > > > I've noticed a bunch of: > > [ 566.106745] [drm:drm_mode_addfb2] [FB:58] > [ 566.111384] [drm:drm_fb_get_bpp_depth] unsupported pixel format NV12 little-endian (0x3231564e) > [ 566.121283] [drm:drm_mode_addfb2] [FB:59] > [ 566.125912] [drm:drm_fb_get_bpp_depth] unsupported pixel format NV12 little-endian (0x3231564e) > > And on investigating, they probably come from drm_helper_mode_fill_fb_struct > in intel_framebuffer_init. > > Result is that fb->depth and fb->bits_per_pixel will be zero, which can't be good. :) Actually it is good. We have the same situation with all YCbCr formats.
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index d3773d2..6e693c4 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -13953,6 +13953,33 @@ static int intel_framebuffer_init(struct drm_device *dev, return -EINVAL; } break; + case DRM_FORMAT_NV12: + if (INTEL_INFO(dev)->gen < 9) { + DRM_DEBUG("unsupported pixel format: %s\n", + drm_get_format_name(mode_cmd->pixel_format)); + return -EINVAL; + } + if (!mode_cmd->offsets[1]) { + DRM_DEBUG("uv start offset not set\n"); + return -EINVAL; + } + if (mode_cmd->pitches[0] != mode_cmd->pitches[1] || + mode_cmd->handles[0] != mode_cmd->handles[1]) { + DRM_DEBUG("y and uv subplanes have different parameters\n"); + return -EINVAL; + } + if (mode_cmd->modifier[1] == I915_FORMAT_MOD_Yf_TILED && + (mode_cmd->offsets[1] & 0xFFF)) { + DRM_DEBUG("tile-Yf uv offset 0x%x isn't starting on new tile-row\n", + mode_cmd->offsets[1]); + return -EINVAL; + } + if (mode_cmd->modifier[1] == I915_FORMAT_MOD_Y_TILED && + ((mode_cmd->offsets[1] % mode_cmd->pitches[1]) % 4)) { + DRM_DEBUG("tile-Y uv offset 0x%x isn't 4-line aligned\n", + mode_cmd->offsets[1]); + } + break; default: DRM_DEBUG("unsupported pixel format: %s\n", drm_get_format_name(mode_cmd->pixel_format));
This patch adds NV12 as supported format to intel_framebuffer_init and performs various checks. Signed-off-by: Chandra Konduru <chandra.konduru@intel.com> Testcase: igt/kms_nv12 --- drivers/gpu/drm/i915/intel_display.c | 27 +++++++++++++++++++++++++++ 1 file changed, 27 insertions(+)