From patchwork Thu May 7 14:15:46 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Robert Bragg X-Patchwork-Id: 6358471 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id D35AABEEE1 for ; Thu, 7 May 2015 14:16:04 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id F1B592034E for ; Thu, 7 May 2015 14:16:03 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 18FB020361 for ; Thu, 7 May 2015 14:16:03 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 8D7D46E817; Thu, 7 May 2015 07:16:02 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail-wi0-f179.google.com (mail-wi0-f179.google.com [209.85.212.179]) by gabe.freedesktop.org (Postfix) with ESMTP id 9442A6E836; Thu, 7 May 2015 07:16:00 -0700 (PDT) Received: by wiun10 with SMTP id n10so61655857wiu.1; Thu, 07 May 2015 07:15:59 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=YI7SjQb2ynhdUSXUPti5WrPgyDjOhn7+1IGnYlZ3iYk=; b=t92peyJxtvmzQmJfC8iLnzbhgnMzr5YEBLJyQaXbbPs1lGvRPVv0rnUJ8NTPybIc+I 8B/LhowScsvseA6gRwxsMA+54Gn2UkcYB5Os4xxB4gBMGsYDETnIN11EBzAWaLGu1Lda v7Ori9pUWgI90F4WuXSRNaA3u5+6cuV3t/rNAly6lEVslJJARapF36oOPLraDKW9A+Gr sACLOWrU8MRhn892W/U3FqEzteW7BaC3LYs022NR/P3z2JSM7gXu104XUn3MRqfsWspZ MfLkYnUUOERlchEAAqFDJXpWA64nC5LEb5Y8WWofBdWEBS7dScsrMT32jeYOMQNL6/kq 6TqQ== X-Received: by 10.194.86.101 with SMTP id o5mr8256569wjz.8.1431008159916; Thu, 07 May 2015 07:15:59 -0700 (PDT) Received: from sixbynine.org (cpc26-heme10-2-0-cust305.9-1.cable.virginm.net. [86.3.57.50]) by mx.google.com with ESMTPSA id gy8sm4210641wib.13.2015.05.07.07.15.59 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 07 May 2015 07:15:59 -0700 (PDT) From: Robert Bragg To: intel-gfx@lists.freedesktop.org Date: Thu, 7 May 2015 15:15:46 +0100 Message-Id: <1431008154-6833-4-git-send-email-robert@sixbynine.org> X-Mailer: git-send-email 2.3.2 In-Reply-To: <1431008154-6833-1-git-send-email-robert@sixbynine.org> References: <1431008154-6833-1-git-send-email-robert@sixbynine.org> Cc: Peter Zijlstra , David Airlie , linux-api@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, Ingo Molnar , Paul Mackerras , Arnaldo Carvalho de Melo , Daniel Vetter Subject: [Intel-gfx] [RFC PATCH 03/11] perf: Add PERF_EVENT_IOC_FLUSH ioctl X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-4.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED, T_DKIM_INVALID, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP To allow for pmus that may have internal buffering (e.g. the hardware itself writes out data to its own circular buffer which is only periodically forwarded to userspace via perf) this ioctl enables userspace to explicitly ensure it has received all samples before a point in time. Signed-off-by: Robert Bragg --- include/linux/perf_event.h | 7 +++++++ include/uapi/linux/perf_event.h | 1 + kernel/events/core.c | 5 +++++ 3 files changed, 13 insertions(+) diff --git a/include/linux/perf_event.h b/include/linux/perf_event.h index 1af35b4..69a0cb9 100644 --- a/include/linux/perf_event.h +++ b/include/linux/perf_event.h @@ -266,6 +266,13 @@ struct pmu { * flush branch stack on context-switches (needed in cpu-wide mode) */ void (*flush_branch_stack) (void); + + /* + * Flush buffered samples (E.g. for pmu hardware that writes samples to + * some intermediate buffer) userspace may need to explicitly ensure + * such samples have been forwarded to perf. + */ + void (*flush) (struct perf_event *event); /*optional */ }; /** diff --git a/include/uapi/linux/perf_event.h b/include/uapi/linux/perf_event.h index 9b79abb..a25967b 100644 --- a/include/uapi/linux/perf_event.h +++ b/include/uapi/linux/perf_event.h @@ -360,6 +360,7 @@ struct perf_event_attr { #define PERF_EVENT_IOC_SET_OUTPUT _IO ('$', 5) #define PERF_EVENT_IOC_SET_FILTER _IOW('$', 6, char *) #define PERF_EVENT_IOC_ID _IOR('$', 7, __u64 *) +#define PERF_EVENT_IOC_FLUSH _IO ('$', 8) enum perf_event_ioc_flags { PERF_IOC_FLAG_GROUP = 1U << 0, diff --git a/kernel/events/core.c b/kernel/events/core.c index 7218b01..340deaa 100644 --- a/kernel/events/core.c +++ b/kernel/events/core.c @@ -3981,6 +3981,11 @@ static long _perf_ioctl(struct perf_event *event, unsigned int cmd, unsigned lon case PERF_EVENT_IOC_SET_FILTER: return perf_event_set_filter(event, (void __user *)arg); + case PERF_EVENT_IOC_FLUSH: + if (event->pmu->flush) + event->pmu->flush(event); + return 0; + default: return -ENOTTY; }