From patchwork Thu May 7 14:15:49 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Robert Bragg X-Patchwork-Id: 6358511 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id EF4A1BEEE1 for ; Thu, 7 May 2015 14:16:12 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id D3E27203C1 for ; Thu, 7 May 2015 14:16:10 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 311242034E for ; Thu, 7 May 2015 14:16:09 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 5C8036E841; Thu, 7 May 2015 07:16:08 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail-wg0-f47.google.com (mail-wg0-f47.google.com [74.125.82.47]) by gabe.freedesktop.org (Postfix) with ESMTP id 3CC466E83F; Thu, 7 May 2015 07:16:05 -0700 (PDT) Received: by wgyo15 with SMTP id o15so45068481wgy.2; Thu, 07 May 2015 07:16:04 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=BgATXd029xnt5+li9K9UubIYEIG+M4PvtgJHTm1Glbk=; b=acB0Ajt+hJQqtoW93h0YH7JGDt2bmq3ayL3aagf87YzG8K/YtQ349mJeOTGuyyKLmq Yj5Tgs+R6YmUtrXDHjDDyiQOXkrS9W64raH2O/4wEVrEHdY9rban7s31fqSCCw8B0GOB iBkqOADEgLlyWcvRnXgbYrFGUv3QhMjjc5ojN4OYeh+E8sG+As9BkxMQo7xguzw7XlcM NczDJbxP5yOCiRpy7kw02eWMVEZXHFdZkYLr6PHcRATk6vK5ILgzGnZvuxTXHM2DCdOL 6R5LgO4UrWMKD9h7KJikxcQKEkbgFN91sGEQz8NnY6ZtqL2aV5hq63bherOa8xGGwmLF mL9w== X-Received: by 10.194.23.197 with SMTP id o5mr8090158wjf.75.1431008164184; Thu, 07 May 2015 07:16:04 -0700 (PDT) Received: from sixbynine.org (cpc26-heme10-2-0-cust305.9-1.cable.virginm.net. [86.3.57.50]) by mx.google.com with ESMTPSA id di7sm4191296wib.23.2015.05.07.07.16.03 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 07 May 2015 07:16:03 -0700 (PDT) From: Robert Bragg To: intel-gfx@lists.freedesktop.org Date: Thu, 7 May 2015 15:15:49 +0100 Message-Id: <1431008154-6833-7-git-send-email-robert@sixbynine.org> X-Mailer: git-send-email 2.3.2 In-Reply-To: <1431008154-6833-1-git-send-email-robert@sixbynine.org> References: <1431008154-6833-1-git-send-email-robert@sixbynine.org> Cc: Peter Zijlstra , David Airlie , linux-api@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, Ingo Molnar , Paul Mackerras , Arnaldo Carvalho de Melo , Daniel Vetter Subject: [Intel-gfx] [RFC PATCH 06/11] drm/i915: rename OACONTROL GEN7_OACONTROL X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-4.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED, T_DKIM_INVALID, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP OACONTROL changes quite a bit for gen8, with some bits split out into a per-context OACTXCONTROL register Signed-off-by: Robert Bragg --- drivers/gpu/drm/i915/i915_cmd_parser.c | 4 ++-- drivers/gpu/drm/i915/i915_reg.h | 2 +- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_cmd_parser.c b/drivers/gpu/drm/i915/i915_cmd_parser.c index 9605ff8..f7ef20c 100644 --- a/drivers/gpu/drm/i915/i915_cmd_parser.c +++ b/drivers/gpu/drm/i915/i915_cmd_parser.c @@ -417,7 +417,7 @@ static const u32 gen7_render_regs[] = { REG64(CL_PRIMITIVES_COUNT), REG64(PS_INVOCATION_COUNT), REG64(PS_DEPTH_COUNT), - OACONTROL, /* Only allowed for LRI and SRM. See below. */ + GEN7_OACONTROL, /* Only allowed for LRI and SRM. See below. */ REG64(MI_PREDICATE_SRC0), REG64(MI_PREDICATE_SRC1), GEN7_3DPRIM_END_OFFSET, @@ -961,7 +961,7 @@ static bool check_cmd(const struct intel_engine_cs *ring, * that will be written to the register. Hence, limit * OACONTROL writes to only MI_LOAD_REGISTER_IMM commands. */ - if (reg_addr == OACONTROL) { + if (reg_addr == GEN7_OACONTROL) { if (desc->cmd.value == MI_LOAD_REGISTER_MEM) { DRM_DEBUG_DRIVER("CMD: Rejected LRM to OACONTROL\n"); return false; diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index d47afbc..2fa1669 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -515,7 +515,7 @@ #define GEN7_3DPRIM_START_INSTANCE 0x243C #define GEN7_3DPRIM_BASE_VERTEX 0x2440 -#define OACONTROL 0x2360 +#define GEN7_OACONTROL 0x2360 #define _GEN7_PIPEA_DE_LOAD_SL 0x70068 #define _GEN7_PIPEB_DE_LOAD_SL 0x71068