From patchwork Thu May 7 17:26:43 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Lespiau, Damien" X-Patchwork-Id: 6359741 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id B154FBEEEF for ; Thu, 7 May 2015 17:26:58 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id D6EBB203AF for ; Thu, 7 May 2015 17:26:57 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 5FC2E20392 for ; Thu, 7 May 2015 17:26:56 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 111AE6E87A; Thu, 7 May 2015 10:26:54 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by gabe.freedesktop.org (Postfix) with ESMTP id D85576E871 for ; Thu, 7 May 2015 10:26:52 -0700 (PDT) Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by orsmga103.jf.intel.com with ESMTP; 07 May 2015 10:26:51 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.13,384,1427785200"; d="scan'208";a="706823789" Received: from rpeel-mobl3.ger.corp.intel.com (HELO strange.ger.corp.intel.com) ([10.252.14.166]) by fmsmga001.fm.intel.com with ESMTP; 07 May 2015 10:26:49 -0700 From: Damien Lespiau To: intel-gfx@lists.freedesktop.org Date: Thu, 7 May 2015 18:26:43 +0100 Message-Id: <1431019605-9786-4-git-send-email-damien.lespiau@intel.com> X-Mailer: git-send-email 2.1.0 In-Reply-To: <1431019605-9786-1-git-send-email-damien.lespiau@intel.com> References: <1431019605-9786-1-git-send-email-damien.lespiau@intel.com> Subject: [Intel-gfx] [PATCH i-g-t 3/5] skl_compute_wrpll: Make sure we respect the DCO frequency constraints X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP We might as well verify that we have a semblance of all being in order by making sure the DCO frequency is within the expected bounds. Signed-off-by: Damien Lespiau --- tools/skl_compute_wrpll.c | 42 ++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 42 insertions(+) diff --git a/tools/skl_compute_wrpll.c b/tools/skl_compute_wrpll.c index 195163c..4f7ea9a 100644 --- a/tools/skl_compute_wrpll.c +++ b/tools/skl_compute_wrpll.c @@ -60,6 +60,10 @@ struct skl_wrpll_params { uint32_t kdiv; uint32_t pdiv; uint32_t central_freq; + + /* for this test code only */ + uint64_t central_freq_hz; + unsigned int p0, p1, p2; }; static bool @@ -239,6 +243,12 @@ found: } + /* for this unit test only */ + wrpll_params->central_freq_hz = dco_central_freq[min_dco_index]; + wrpll_params->p0 = candidate_p0[min_dco_index]; + wrpll_params->p1 = candidate_p1[min_dco_index]; + wrpll_params->p2 = candidate_p2[min_dco_index]; + return true; } @@ -406,6 +416,7 @@ skl_ddi_calculate_wrpll2(int clock /* in Hz */, }; struct skl_wrpll_context ctx; unsigned int dco, d, i; + unsigned int p0, p1, p2; skl_wrpll_context_init(&ctx); @@ -428,6 +439,12 @@ skl_ddi_calculate_wrpll2(int clock /* in Hz */, skl_wrpll_get_multipliers(ctx.p, &p0, &p1, &p2); + /* for this unit test only */ + wrpll_params->central_freq_hz = ctx.central_freq; + wrpll_params->p0 = p0; + wrpll_params->p1 = p1; + wrpll_params->p2 = p2; + return true; } @@ -829,6 +846,31 @@ static void test_run(struct test_ops *test) clock); continue; } + + /* + * make sure we respect the +1%/-6% contraint around the + * central frequency + */ + { + unsigned int p = params.p0 * params.p1 * params.p2; + uint64_t dco_freq = (uint64_t)p * clock * 5; + uint64_t central_freq = params.central_freq_hz; + uint64_t deviation; + uint64_t diff; + + diff = abs_diff(dco_freq, central_freq); + deviation = div64_u64(10000 * diff, central_freq); + + if (dco_freq > central_freq) { + if (deviation > 100) + printf("failed constraint for %dHz " + "deviation=%"PRIu64"\n", clock, + deviation); + } else if (deviation > 600) + printf("failed constraint for %dHz " + "deviation=%"PRIu64"\n", clock, + deviation); + } } }