| Message ID | 1431334872-3114-2-git-send-email-abdiel.janulgue@linux.intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Mon, May 11, 2015 at 12:01:11PM +0300, Abdiel Janulgue wrote: > Ensures that the batch buffer is executed by the resource streamer > > Signed-off-by: Abdiel Janulgue <abdiel.janulgue@linux.intel.com> > --- > drivers/gpu/drm/i915/i915_gem_execbuffer.c | 15 +++++++++++++++ > drivers/gpu/drm/i915/intel_ringbuffer.h | 1 + > include/uapi/drm/i915_drm.h | 7 ++++++- > 3 files changed, 22 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c > index a3190e79..afbd3c16 100644 > --- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c > +++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c > @@ -1474,6 +1474,21 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data, > } else > ring = &dev_priv->ring[(args->flags & I915_EXEC_RING_MASK) - 1]; > > + if (args->flags & I915_EXEC_RESOURCE_STREAMER) { > + if (!IS_HASWELL(dev) && INTEL_INFO(dev)->gen < 8) { > + DRM_DEBUG("RS is only allowed for Haswell, Gen8 " > + "and above\n"); > + return -EINVAL; > + } > + if (ring->id != RCS) { > + DRM_DEBUG("RS is not available on %s)\n", > + ring->name); > + return -EINVAL; > + } > + > + dispatch_flags |= I915_DISPATCH_RS; > + } > + > if (!intel_ring_initialized(ring)) { Please don't split the conversion from args->flags to ring from its subsequent EINVAL check. -Chris
On 05/12/2015 12:49 PM, Chris Wilson wrote: > On Mon, May 11, 2015 at 12:01:11PM +0300, Abdiel Janulgue wrote: >> Ensures that the batch buffer is executed by the resource streamer >> >> Signed-off-by: Abdiel Janulgue <abdiel.janulgue@linux.intel.com> >> --- >> drivers/gpu/drm/i915/i915_gem_execbuffer.c | 15 +++++++++++++++ >> drivers/gpu/drm/i915/intel_ringbuffer.h | 1 + >> include/uapi/drm/i915_drm.h | 7 ++++++- >> 3 files changed, 22 insertions(+), 1 deletion(-) >> >> diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c >> index a3190e79..afbd3c16 100644 >> --- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c >> +++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c >> @@ -1474,6 +1474,21 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data, >> } else >> ring = &dev_priv->ring[(args->flags & I915_EXEC_RING_MASK) - 1]; >> >> + if (args->flags & I915_EXEC_RESOURCE_STREAMER) { >> + if (!IS_HASWELL(dev) && INTEL_INFO(dev)->gen < 8) { >> + DRM_DEBUG("RS is only allowed for Haswell, Gen8 " >> + "and above\n"); >> + return -EINVAL; >> + } >> + if (ring->id != RCS) { >> + DRM_DEBUG("RS is not available on %s)\n", >> + ring->name); >> + return -EINVAL; >> + } >> + >> + dispatch_flags |= I915_DISPATCH_RS; >> + } >> + >> if (!intel_ring_initialized(ring)) { > > Please don't split the conversion from args->flags to ring from its > subsequent EINVAL check. > -Chris > I'll include this change in the next version.
diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c index a3190e79..afbd3c16 100644 --- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c +++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c @@ -1474,6 +1474,21 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data, } else ring = &dev_priv->ring[(args->flags & I915_EXEC_RING_MASK) - 1]; + if (args->flags & I915_EXEC_RESOURCE_STREAMER) { + if (!IS_HASWELL(dev) && INTEL_INFO(dev)->gen < 8) { + DRM_DEBUG("RS is only allowed for Haswell, Gen8 " + "and above\n"); + return -EINVAL; + } + if (ring->id != RCS) { + DRM_DEBUG("RS is not available on %s)\n", + ring->name); + return -EINVAL; + } + + dispatch_flags |= I915_DISPATCH_RS; + } + if (!intel_ring_initialized(ring)) { DRM_DEBUG("execbuf with invalid ring: %d\n", (int)(args->flags & I915_EXEC_RING_MASK)); diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h index c761fe0..3521bc0 100644 --- a/drivers/gpu/drm/i915/intel_ringbuffer.h +++ b/drivers/gpu/drm/i915/intel_ringbuffer.h @@ -167,6 +167,7 @@ struct intel_engine_cs { unsigned dispatch_flags); #define I915_DISPATCH_SECURE 0x1 #define I915_DISPATCH_PINNED 0x2 +#define I915_DISPATCH_RS 0x4 void (*cleanup)(struct intel_engine_cs *ring); /* GEN8 signal/wait table - never trust comments! diff --git a/include/uapi/drm/i915_drm.h b/include/uapi/drm/i915_drm.h index 551b673..a4c1a5c 100644 --- a/include/uapi/drm/i915_drm.h +++ b/include/uapi/drm/i915_drm.h @@ -760,7 +760,12 @@ struct drm_i915_gem_execbuffer2 { #define I915_EXEC_BSD_RING1 (1<<13) #define I915_EXEC_BSD_RING2 (2<<13) -#define __I915_EXEC_UNKNOWN_FLAGS -(1<<15) +/** Tell the kernel that the batchbuffer is processed by + * the resource streamer. + */ +#define I915_EXEC_RESOURCE_STREAMER (1<<16) + +#define __I915_EXEC_UNKNOWN_FLAGS -(I915_EXEC_RESOURCE_STREAMER <<1) #define I915_EXEC_CONTEXT_ID_MASK (0xffffffff) #define i915_execbuffer2_set_context_id(eb2, context) \
Ensures that the batch buffer is executed by the resource streamer Signed-off-by: Abdiel Janulgue <abdiel.janulgue@linux.intel.com> --- drivers/gpu/drm/i915/i915_gem_execbuffer.c | 15 +++++++++++++++ drivers/gpu/drm/i915/intel_ringbuffer.h | 1 + include/uapi/drm/i915_drm.h | 7 ++++++- 3 files changed, 22 insertions(+), 1 deletion(-)