From patchwork Mon May 18 05:11:05 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chandra Konduru X-Patchwork-Id: 6426261 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 627669F1CC for ; Mon, 18 May 2015 05:12:46 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 68896205EE for ; Mon, 18 May 2015 05:12:45 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 6EC01205DB for ; Mon, 18 May 2015 05:12:44 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 77EBA6E42B; Sun, 17 May 2015 22:12:43 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by gabe.freedesktop.org (Postfix) with ESMTP id 6A10D6E42A for ; Sun, 17 May 2015 22:12:42 -0700 (PDT) Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by fmsmga101.fm.intel.com with ESMTP; 17 May 2015 22:12:42 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.13,450,1427785200"; d="scan'208";a="711701010" Received: from cmkondur-desk2.fm.intel.com ([10.19.123.59]) by fmsmga001.fm.intel.com with ESMTP; 17 May 2015 22:12:42 -0700 From: Chandra Konduru To: intel-gfx@lists.freedesktop.org Date: Sun, 17 May 2015 22:11:05 -0700 Message-Id: <1431925865-7637-13-git-send-email-chandra.konduru@intel.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1431925865-7637-1-git-send-email-chandra.konduru@intel.com> References: <1431925865-7637-1-git-send-email-chandra.konduru@intel.com> Cc: daniel.vetter@intel.com, ville.syrjala@intel.com Subject: [Intel-gfx] [PATCH 12/12] drm/i915: Add 90/270 rotation for NV12 format. X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Adding NV12 90/270 rotation support for primary and sprite planes. Signed-off-by: Chandra Konduru Testcase: igt/kms_nv12 --- drivers/gpu/drm/i915/intel_display.c | 23 ++++++++++++++++------- drivers/gpu/drm/i915/intel_sprite.c | 32 +++++++++++++++++++++++++------- 2 files changed, 41 insertions(+), 14 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index cb3a0fc..d108a97 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -3105,7 +3105,8 @@ static void skylake_update_primary_plane(struct drm_crtc *crtc, int src_x = 0, src_y = 0, src_w = 0, src_h = 0; int dst_x = 0, dst_y = 0, dst_w = 0, dst_h = 0; int scaler_id = -1; - u32 aux_dist = 0, aux_x_offset = 0, aux_y_offset = 0, aux_stride = 0; + unsigned long aux_dist = 0; + u32 aux_x_offset = 0, aux_y_offset = 0, aux_stride = 0; u32 tile_row_adjustment = 0; plane_state = to_intel_plane_state(plane->state); @@ -3163,12 +3164,16 @@ static void skylake_update_primary_plane(struct drm_crtc *crtc, x_offset = stride * tile_height - y - src_h; y_offset = x; plane_size = (src_w - 1) << 16 | (src_h - 1); - /* - * TBD: For NV12 90/270 rotation, Y and UV subplanes should - * be treated as separate surfaces and GTT remapping for - * rotation should be done separately for each subplane. - * Enable support once seperate remappings are available. - */ + + if (fb->pixel_format == DRM_FORMAT_NV12) { + u32 uv_tile_height = intel_tile_height(dev, fb->pixel_format, + fb->modifier[0], 1); + aux_stride = DIV_ROUND_UP(fb->height / 2, uv_tile_height); + aux_dist = intel_plane_obj_offset(to_intel_plane(plane), obj, 1) - + surf_addr; + aux_x_offset = aux_stride * uv_tile_height - y / 2 - fb->height / 2; + aux_y_offset = x / 2; + } } else { stride = fb->pitches[0] / stride_div; x_offset = x; @@ -13172,6 +13177,10 @@ intel_check_primary_plane(struct drm_plane *plane, if (fb && format_is_yuv(fb->pixel_format)) { src->x1 &= ~0x10000; src->x2 &= ~0x10000; + if (intel_rotation_90_or_270(state->base.rotation)) { + src->y1 &= ~0x10000; + src->y2 &= ~0x10000; + } } if (INTEL_INFO(dev)->gen >= 9) { diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c index 42cfac8..8b5be50 100644 --- a/drivers/gpu/drm/i915/intel_sprite.c +++ b/drivers/gpu/drm/i915/intel_sprite.c @@ -190,7 +190,8 @@ skl_update_plane(struct drm_plane *drm_plane, struct drm_crtc *crtc, int x_offset, y_offset; struct intel_crtc_state *crtc_state = to_intel_crtc(crtc)->config; int scaler_id; - u32 aux_dist = 0, aux_x_offset = 0, aux_y_offset = 0, aux_stride = 0; + unsigned long aux_dist = 0; + u32 aux_x_offset = 0, aux_y_offset = 0, aux_stride = 0; u32 tile_row_adjustment = 0; plane_ctl = PLANE_CTL_ENABLE | @@ -239,12 +240,14 @@ skl_update_plane(struct drm_plane *drm_plane, struct drm_crtc *crtc, x_offset = stride * tile_height - y - (src_h + 1); y_offset = x; - /* - * TBD: For NV12 90/270 rotation, Y and UV subplanes should - * be treated as separate surfaces and GTT remapping for - * rotation should be done separately for each subplane. - * Enable support once seperate remappings are available. - */ + if (fb->pixel_format == DRM_FORMAT_NV12) { + u32 uv_tile_height = intel_tile_height(dev, fb->pixel_format, + fb->modifier[0], 1); + aux_stride = DIV_ROUND_UP(fb->height / 2, uv_tile_height); + aux_dist = intel_plane_obj_offset(intel_plane, obj, 1) - surf_addr; + aux_x_offset = aux_stride * uv_tile_height - y / 2 - fb->height / 2; + aux_y_offset = x / 2; + } } else { stride = fb->pitches[0] / stride_div; plane_size = (src_h << 16) | src_w; @@ -909,6 +912,21 @@ intel_check_sprite_plane(struct drm_plane *plane, if (crtc_w == 0) state->visible = false; + + if (intel_rotation_90_or_270(state->base.rotation)) { + src_y &= ~1; + src_h &= ~1; + + /* + * Must keep src and dst the + * same if we can't scale. + */ + if (!intel_plane->can_scale) + crtc_h &= ~1; + + if (crtc_h == 0) + state->visible = false; + } } }