From patchwork Tue May 19 16:13:30 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: jim.bride@linux.intel.com X-Patchwork-Id: 6439331 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id A22099F399 for ; Tue, 19 May 2015 16:11:14 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id CFA61203DF for ; Tue, 19 May 2015 16:11:10 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id F11F82039C for ; Tue, 19 May 2015 16:11:06 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id C3DB86E066; Tue, 19 May 2015 09:11:05 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by gabe.freedesktop.org (Postfix) with ESMTP id BEDAB6E066 for ; Tue, 19 May 2015 09:11:04 -0700 (PDT) Received: from orsmga003.jf.intel.com ([10.7.209.27]) by fmsmga102.fm.intel.com with ESMTP; 19 May 2015 09:10:23 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.13,458,1427785200"; d="scan'208";a="573728758" Received: from shiv.jf.intel.com ([10.7.198.100]) by orsmga003.jf.intel.com with ESMTP; 19 May 2015 09:10:23 -0700 From: jim.bride@linux.intel.com To: intel-gfx@lists.freedesktop.org Date: Tue, 19 May 2015 09:13:30 -0700 Message-Id: <1432052010-13412-1-git-send-email-jim.bride@linux.intel.com> X-Mailer: git-send-email 1.9.1 Subject: [Intel-gfx] [PATCH] drm/i915/hsw: Fix workaround for server AUX channel clock divisor X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Jim Bride According to the HSW b-spec we need to try clock divisors of 63 and 72, each 3 or more times, when attempting DP AUX channel communication on a server chipset. This actually wasn't happening due to a short-circuit that only checked the DP_AUX_CH_CTL_DONE bit in status rather than checking that the operation was done and that DP_AUX_CH_CTL_TIME_OUT_ERROR was not set. Signed-off-by: Jim Bride Reviewed-by: Todd Previte --- drivers/gpu/drm/i915/intel_dp.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index 0edc305..c01a3f9 100644 --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c @@ -895,7 +895,8 @@ intel_dp_aux_ch(struct intel_dp *intel_dp, if (status & DP_AUX_CH_CTL_DONE) break; } - if (status & DP_AUX_CH_CTL_DONE) + if ((status & DP_AUX_CH_CTL_DONE) && + !(status & DP_AUX_CH_CTL_TIME_OUT_ERROR)) break; }