From patchwork Fri May 29 18:03:24 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: arun.siluvery@linux.intel.com X-Patchwork-Id: 6510341 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id A90ED9F38C for ; Fri, 29 May 2015 18:04:14 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id C881E204CF for ; Fri, 29 May 2015 18:04:13 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id DB4A120841 for ; Fri, 29 May 2015 18:04:12 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 65BB96EE33; Fri, 29 May 2015 11:04:12 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by gabe.freedesktop.org (Postfix) with ESMTP id 7A00A6EE30 for ; Fri, 29 May 2015 11:04:06 -0700 (PDT) Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by fmsmga101.fm.intel.com with ESMTP; 29 May 2015 11:03:43 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.13,518,1427785200"; d="scan'208";a="733842503" Received: from asiluver-linux.isw.intel.com ([10.102.226.85]) by fmsmga002.fm.intel.com with ESMTP; 29 May 2015 11:03:42 -0700 From: Arun Siluvery To: intel-gfx@lists.freedesktop.org Date: Fri, 29 May 2015 19:03:24 +0100 Message-Id: <1432922605-5893-7-git-send-email-arun.siluvery@linux.intel.com> X-Mailer: git-send-email 2.3.0 In-Reply-To: <1432922605-5893-1-git-send-email-arun.siluvery@linux.intel.com> References: <1432922605-5893-1-git-send-email-arun.siluvery@linux.intel.com> Subject: [Intel-gfx] [PATCH v2 6/7] drm/i915/gen8: Add WaClearSlmSpaceAtContextSwitch workaround X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP In Indirect context w/a batch buffer, WaClearSlmSpaceAtContextSwitch v2: s/PIPE_CONTROL_FLUSH_RO_CACHES/PIPE_CONTROL_FLUSH_L3 (Ville) Signed-off-by: Rafael Barbalho Signed-off-by: Arun Siluvery --- drivers/gpu/drm/i915/i915_reg.h | 1 + drivers/gpu/drm/i915/intel_lrc.c | 24 ++++++++++++++++++++++++ 2 files changed, 25 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 5203c79..33b0ff1 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -410,6 +410,7 @@ #define DISPLAY_PLANE_A (0<<20) #define DISPLAY_PLANE_B (1<<20) #define GFX_OP_PIPE_CONTROL(len) ((0x3<<29)|(0x3<<27)|(0x2<<24)|(len-2)) +#define PIPE_CONTROL_FLUSH_L3 (1<<27) #define PIPE_CONTROL_GLOBAL_GTT_IVB (1<<24) /* gen7+ */ #define PIPE_CONTROL_MMIO_WRITE (1<<23) #define PIPE_CONTROL_STORE_DATA_INDEX (1<<21) diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c index 24a7dcd..c49f2ce 100644 --- a/drivers/gpu/drm/i915/intel_lrc.c +++ b/drivers/gpu/drm/i915/intel_lrc.c @@ -1121,8 +1121,15 @@ create_wa_bb(struct intel_engine_cs *ring, uint32_t bb_size) static int gen8_init_indirectctx_bb(struct intel_engine_cs *ring, struct intel_context *ctx) { + u32 scratch_addr; + unsigned long flags = 0; struct intel_ringbuffer *ringbuf = NULL; + if (ring->scratch.obj == NULL) { + DRM_ERROR("scratch page not allocated for %s\n", ring->name); + return -EINVAL; + } + ringbuf = create_wa_bb(ring, PAGE_SIZE); if (!ringbuf) return -ENOMEM; @@ -1140,6 +1147,23 @@ static int gen8_init_indirectctx_bb(struct intel_engine_cs *ring, intel_logical_ring_emit(ringbuf, 0); intel_logical_ring_emit(ringbuf, 0); + /* WaClearSlmSpaceAtContextSwitch:bdw,chv */ + flags = PIPE_CONTROL_FLUSH_L3 | + PIPE_CONTROL_GLOBAL_GTT_IVB | + PIPE_CONTROL_CS_STALL | + PIPE_CONTROL_QW_WRITE; + + /* Actual scratch location is at 128 bytes offset */ + scratch_addr = ring->scratch.gtt_offset + 2*CACHELINE_BYTES; + scratch_addr |= PIPE_CONTROL_GLOBAL_GTT; + + intel_logical_ring_emit(ringbuf, GFX_OP_PIPE_CONTROL(6)); + intel_logical_ring_emit(ringbuf, flags); + intel_logical_ring_emit(ringbuf, scratch_addr); + intel_logical_ring_emit(ringbuf, 0); + intel_logical_ring_emit(ringbuf, 0); + intel_logical_ring_emit(ringbuf, 0); + /* padding */ while (((unsigned long) ringbuf->tail % CACHELINE_BYTES) != 0) intel_logical_ring_emit(ringbuf, MI_NOOP);