| Message ID | 1434093092-16892-2-git-send-email-mika.kahola@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Fri, 12 Jun 2015, Mika Kahola <mika.kahola@intel.com> wrote: > Limit CHV maximum cdclk to 320MHz. > > v2: Rebase to the latest > v3: Clean up of if-else tree > > Signed-off-by: Mika Kahola <mika.kahola@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> http://mid.gmane.org/20150415191900.GM1237@intel.com > --- > drivers/gpu/drm/i915/intel_display.c | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c > index 5cc2263..c027012 100644 > --- a/drivers/gpu/drm/i915/intel_display.c > +++ b/drivers/gpu/drm/i915/intel_display.c > @@ -5256,6 +5256,8 @@ static void intel_update_max_cdclk(struct drm_device *dev) > dev_priv->max_cdclk_freq = 540000; > else > dev_priv->max_cdclk_freq = 675000; > + } else if (IS_CHERRYVIEW(dev)) { > + dev_priv->max_cdclk_freq = 320000; > } else if (IS_VALLEYVIEW(dev)) { > dev_priv->max_cdclk_freq = 400000; > } else { > -- > 1.9.1 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx
On Mon, Jun 15, 2015 at 05:22:45PM +0300, Jani Nikula wrote: > On Fri, 12 Jun 2015, Mika Kahola <mika.kahola@intel.com> wrote: > > Limit CHV maximum cdclk to 320MHz. > > > > v2: Rebase to the latest > > v3: Clean up of if-else tree > > > > Signed-off-by: Mika Kahola <mika.kahola@intel.com> > > Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> > > http://mid.gmane.org/20150415191900.GM1237@intel.com Queued for -next, thanks for the patch. -Daniel
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 5cc2263..c027012 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -5256,6 +5256,8 @@ static void intel_update_max_cdclk(struct drm_device *dev) dev_priv->max_cdclk_freq = 540000; else dev_priv->max_cdclk_freq = 675000; + } else if (IS_CHERRYVIEW(dev)) { + dev_priv->max_cdclk_freq = 320000; } else if (IS_VALLEYVIEW(dev)) { dev_priv->max_cdclk_freq = 400000; } else {
Limit CHV maximum cdclk to 320MHz. v2: Rebase to the latest v3: Clean up of if-else tree Signed-off-by: Mika Kahola <mika.kahola@intel.com> --- drivers/gpu/drm/i915/intel_display.c | 2 ++ 1 file changed, 2 insertions(+)