From patchwork Mon Jun 22 09:50:14 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: sourab.gupta@intel.com X-Patchwork-Id: 6654431 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 9A7AD9F399 for ; Mon, 22 Jun 2015 09:48:44 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id BB56220636 for ; Mon, 22 Jun 2015 09:48:43 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id DAA3220634 for ; Mon, 22 Jun 2015 09:48:42 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 624A36E5C8; Mon, 22 Jun 2015 02:48:42 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by gabe.freedesktop.org (Postfix) with ESMTP id 3B13E6E5C8 for ; Mon, 22 Jun 2015 02:48:41 -0700 (PDT) Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by orsmga103.jf.intel.com with ESMTP; 22 Jun 2015 02:48:41 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.13,658,1427785200"; d="scan'208";a="748044432" Received: from sourabgu-desktop.iind.intel.com ([10.223.82.35]) by fmsmga002.fm.intel.com with ESMTP; 22 Jun 2015 02:48:38 -0700 From: sourab.gupta@intel.com To: intel-gfx@lists.freedesktop.org Date: Mon, 22 Jun 2015 15:20:14 +0530 Message-Id: <1434966619-3979-4-git-send-email-sourab.gupta@intel.com> X-Mailer: git-send-email 1.8.5.1 In-Reply-To: <1434966619-3979-1-git-send-email-sourab.gupta@intel.com> References: <1434966619-3979-1-git-send-email-sourab.gupta@intel.com> Cc: Insoo Woo , Peter Zijlstra , Jabin Wu , Sourab Gupta Subject: [Intel-gfx] [RFC 3/8] drm/i915: Add the data structures for async OA capture mode X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-5.6 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Sourab Gupta This patch introduces the data structures for capturing asynchronous OA snapshots The data captured will be organized into nodes. Each node has the field for OA report alongwith metadata information such as ctx_id, pid, etc. The metadata information can be extended to provided any additional information. The data is organized to have a queue header at beginning, which will have information about size, data offset, number of nodes captured etc. Signed-off-by: Sourab Gupta --- drivers/gpu/drm/i915/i915_drv.h | 21 +++++++++++++++++++++ include/uapi/drm/i915_drm.h | 5 +++++ 2 files changed, 26 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index ee4a5d3..da150bc 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -1677,6 +1677,27 @@ extern const struct i915_oa_reg i915_oa_sampler_balance_mux_config_hsw[]; extern const int i915_oa_sampler_balance_mux_config_hsw_len; extern const struct i915_oa_reg i915_oa_sampler_balance_b_counter_config_hsw[]; extern const int i915_oa_sampler_balance_b_counter_config_hsw_len; + + +struct drm_i915_oa_async_queue_header { + __u64 size_in_bytes; + /* Byte offset, start of queue header to first node */ + __u64 data_offset; + __u32 node_count; + __u32 wrap_count; + __u32 pad[10]; +}; + +struct drm_i915_oa_async_node_info { + __u32 pid; + __u32 ctx_id; + __u32 pad[14]; +}; + +struct drm_i915_oa_async_node { + struct drm_i915_oa_async_node_info node_info; + __u32 report_perf[64]; /* Must be aligned to 64-byte boundary */ +}; #endif struct drm_i915_private { diff --git a/include/uapi/drm/i915_drm.h b/include/uapi/drm/i915_drm.h index 354dc3a..c91b427 100644 --- a/include/uapi/drm/i915_drm.h +++ b/include/uapi/drm/i915_drm.h @@ -124,6 +124,11 @@ enum drm_i915_oa_event_type { I915_OA_RECORD_MAX, /* non-ABI */ }; +struct drm_i915_oa_async_node_footer { + __u32 pid; + __u32 ctx_id; +}; + /* Each region is a minimum of 16k, and there are at most 255 of them. */ #define I915_NR_TEX_REGIONS 255 /* table size 2k - maximum due to use