From patchwork Fri Jun 26 13:51:55 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ramalingam C X-Patchwork-Id: 6681211 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 37A6FC05AC for ; Fri, 26 Jun 2015 14:00:28 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 474B1204A7 for ; Fri, 26 Jun 2015 14:00:27 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 5470A2049C for ; Fri, 26 Jun 2015 14:00:26 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id C0A186EDCB; Fri, 26 Jun 2015 07:00:25 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by gabe.freedesktop.org (Postfix) with ESMTP id 151756EDCB for ; Fri, 26 Jun 2015 07:00:25 -0700 (PDT) Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by fmsmga101.fm.intel.com with ESMTP; 26 Jun 2015 07:00:23 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.13,685,1427785200"; d="scan'208";a="750978509" Received: from ramaling-desktop.iind.intel.com ([10.223.26.95]) by fmsmga002.fm.intel.com with ESMTP; 26 Jun 2015 07:00:18 -0700 From: Ramalingam C To: intel-gfx@lists.freedesktop.org, daniel.vetter@ffwll.ch, chris@chris-wilson.co.uk, rodrigo.vivi@intel.com Date: Fri, 26 Jun 2015 19:21:55 +0530 Message-Id: <1435326722-24633-12-git-send-email-ramalingam.c@intel.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1435326722-24633-1-git-send-email-ramalingam.c@intel.com> References: <1435326722-24633-1-git-send-email-ramalingam.c@intel.com> Cc: paulo.r.zanoni@intel.com Subject: [Intel-gfx] [RFC PATCH 11/18] drm/i915: Updating the crtc modes in DRRS transitions X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-5.6 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP During the DRRS state transitions we are modifying the clock and hence the vrefresh rate. So we need to update the drm_crtc->mode and the adjusted mode in intel_crtc. So that watermark calculations will be as per the new modified clock. Signed-off-by: Ramalingam C --- drivers/gpu/drm/i915/intel_drrs.c | 14 ++++++++++++++ drivers/gpu/drm/i915/intel_dsi_drrs.c | 14 +++++++++++++- 2 files changed, 27 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/intel_drrs.c b/drivers/gpu/drm/i915/intel_drrs.c index 42b420d..2901832 100644 --- a/drivers/gpu/drm/i915/intel_drrs.c +++ b/drivers/gpu/drm/i915/intel_drrs.c @@ -169,6 +169,20 @@ void intel_set_drrs_state(struct i915_drrs *drrs) * If it is non-DSI encoders. * As only DSI has SEAMLESS_DRRS_SUPPORT_SW. */ + /* + * TODO: Protect the access to the crtc mode with corresponding + * mutex in case of Idleness DRRS. As media playback update + * will happen under crtc modeset lock protection + */ + drm_modeset_lock(&intel_crtc->base.mutex, NULL); + intel_crtc->base.mode.clock = target_mode->clock; + intel_crtc->base.mode.vrefresh = target_mode->vrefresh; + intel_crtc->config->base.adjusted_mode.clock = + target_mode->clock; + intel_crtc->config->base.adjusted_mode.vrefresh = + target_mode->vrefresh; + drm_modeset_unlock(&intel_crtc->base.mutex); + drrs_state->current_rr_type = drrs_state->target_rr_type; DRM_INFO("Refresh Rate set to : %dHz\n", refresh_rate); } diff --git a/drivers/gpu/drm/i915/intel_dsi_drrs.c b/drivers/gpu/drm/i915/intel_dsi_drrs.c index eb0758a..d4bb70a 100644 --- a/drivers/gpu/drm/i915/intel_dsi_drrs.c +++ b/drivers/gpu/drm/i915/intel_dsi_drrs.c @@ -46,6 +46,7 @@ static void intel_mipi_drrs_work_fn(struct work_struct *__work) struct i915_drrs *drrs = work->drrs; struct intel_encoder *intel_encoder = drrs->connector->encoder; struct intel_dsi *intel_dsi = enc_to_intel_dsi(&intel_encoder->base); + struct intel_crtc *intel_crtc = to_intel_crtc(intel_encoder->base.crtc); struct dsi_drrs *dsi_drrs = &intel_dsi->dsi_drrs; struct dsi_mnp *dsi_mnp; struct drm_display_mode *prev_mode = NULL; @@ -69,11 +70,22 @@ retry: /* PLL Programming is successful */ mutex_lock(&drrs->drrs_mutex); drrs->drrs_state.current_rr_type = work->target_rr_type; + + drm_modeset_lock(&intel_crtc->base.mutex, NULL); + intel_crtc->base.mode.clock = work->target_mode->clock; + intel_crtc->base.mode.vrefresh = work->target_mode->vrefresh; + intel_crtc->config->base.adjusted_mode.clock = + work->target_mode->clock; + intel_crtc->config->base.adjusted_mode.vrefresh = + work->target_mode->vrefresh; + drm_modeset_unlock(&intel_crtc->base.mutex); + mutex_unlock(&drrs->drrs_mutex); + DRM_INFO("Refresh Rate set to : %dHz\n", work->target_mode->vrefresh); - /* TODO: Update crtc mode and drain ladency with watermark */ + /* TODO: Update drain ladency with watermark */ } else if (ret == -ETIMEDOUT && retry_cnt) {