From patchwork Fri Jun 26 13:51:58 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ramalingam C X-Patchwork-Id: 6681241 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 889639F39B for ; Fri, 26 Jun 2015 14:00:39 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id AA45D204AB for ; Fri, 26 Jun 2015 14:00:38 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id B40EB204A7 for ; Fri, 26 Jun 2015 14:00:37 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 3574F7A142; Fri, 26 Jun 2015 07:00:36 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by gabe.freedesktop.org (Postfix) with ESMTP id DC5D17A141 for ; Fri, 26 Jun 2015 07:00:34 -0700 (PDT) Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by fmsmga101.fm.intel.com with ESMTP; 26 Jun 2015 07:00:34 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.13,685,1427785200"; d="scan'208";a="750978709" Received: from ramaling-desktop.iind.intel.com ([10.223.26.95]) by fmsmga002.fm.intel.com with ESMTP; 26 Jun 2015 07:00:31 -0700 From: Ramalingam C To: intel-gfx@lists.freedesktop.org, daniel.vetter@ffwll.ch, chris@chris-wilson.co.uk, rodrigo.vivi@intel.com Date: Fri, 26 Jun 2015 19:21:58 +0530 Message-Id: <1435326722-24633-15-git-send-email-ramalingam.c@intel.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1435326722-24633-1-git-send-email-ramalingam.c@intel.com> References: <1435326722-24633-1-git-send-email-ramalingam.c@intel.com> Cc: paulo.r.zanoni@intel.com Subject: [Intel-gfx] [RFC PATCH 14/18] drm/i915: MEDIA_RR support in eDP DRRS module X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-5.6 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Content based DRRS support is implemented in eDP DRRS module also. Signed-off-by: Ramalingam C --- drivers/gpu/drm/i915/intel_drv.h | 3 +++ drivers/gpu/drm/i915/intel_edp_drrs.c | 29 +++++++++++++++++++++++++++++ 2 files changed, 32 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h index b364a68..3a5cff8 100644 --- a/drivers/gpu/drm/i915/intel_drv.h +++ b/drivers/gpu/drm/i915/intel_drv.h @@ -419,6 +419,9 @@ struct intel_crtc_state { /* m2_n2 for eDP downclock */ struct intel_link_m_n dp_m2_n2; + + /* m3_n3 for eDP Media playback DRRS */ + struct intel_link_m_n dp_m3_n3; bool has_drrs; /* diff --git a/drivers/gpu/drm/i915/intel_edp_drrs.c b/drivers/gpu/drm/i915/intel_edp_drrs.c index 8968e4c..173c281 100644 --- a/drivers/gpu/drm/i915/intel_edp_drrs.c +++ b/drivers/gpu/drm/i915/intel_edp_drrs.c @@ -45,6 +45,8 @@ static int vlv_edp_set_drrs_state(struct intel_encoder *encoder, struct drm_device *dev = encoder->base.dev; struct drm_i915_private *dev_priv = dev->dev_private; struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc); + struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base); + struct i915_drrs *drrs; u32 reg, val; if (!crtc) @@ -53,6 +55,10 @@ static int vlv_edp_set_drrs_state(struct intel_encoder *encoder, reg = PIPECONF(crtc->config->cpu_transcoder); val = I915_READ(reg); + drrs = dev_priv->drrs[get_drrs_struct_index_for_crtc(dev_priv, crtc)]; + if (!drrs || !drrs->has_drrs) + return -EINVAL; + switch (target_rr_type) { case DRRS_HIGH_RR: if (IS_VALLEYVIEW(dev)) @@ -62,6 +68,29 @@ static int vlv_edp_set_drrs_state(struct intel_encoder *encoder, if (IS_VALLEYVIEW(dev)) val |= PIPECONF_EDP_RR_MODE_SWITCH_VLV; break; + case DRRS_MEDIA_RR: + if (drrs->connector->panel.target_mode->vrefresh == + drrs->connector->panel.fixed_mode->vrefresh) { + /* Exiting from MEDIA_RR */ + if (IS_VALLEYVIEW(dev)) + val &= ~PIPECONF_EDP_RR_MODE_SWITCH_VLV; + + intel_dp_set_m_n(crtc, &crtc->config->dp_m_n, + &crtc->config->dp_m2_n2); + } else { + intel_link_compute_m_n(crtc->config->pipe_bpp, + intel_dp->lane_count, + drrs->connector->panel.target_mode->clock, + crtc->config->port_clock, + &crtc->config->dp_m3_n3); + + if (IS_VALLEYVIEW(dev)) + val |= PIPECONF_EDP_RR_MODE_SWITCH_VLV; + + intel_dp_set_m_n(crtc, &crtc->config->dp_m_n, + &crtc->config->dp_m3_n3); + } + break; default: DRM_ERROR("invalid refresh rate type\n"); return -EINVAL;