From patchwork Tue Jun 30 15:01:11 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dave Gordon X-Patchwork-Id: 6696961 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 64D3E9F39B for ; Tue, 30 Jun 2015 15:01:28 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 8155920622 for ; Tue, 30 Jun 2015 15:01:26 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 8F51C2061F for ; Tue, 30 Jun 2015 15:01:25 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 17C6C6E996; Tue, 30 Jun 2015 08:01:25 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by gabe.freedesktop.org (Postfix) with ESMTP id B65CD6E99C for ; Tue, 30 Jun 2015 08:01:23 -0700 (PDT) Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by orsmga101.jf.intel.com with ESMTP; 30 Jun 2015 08:01:23 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.15,378,1432623600"; d="scan'208";a="753322141" Received: from dsgordon-linux.isw.intel.com ([10.102.226.51]) by fmsmga002.fm.intel.com with ESMTP; 30 Jun 2015 08:01:22 -0700 From: Dave Gordon To: intel-gfx@lists.freedesktop.org Date: Tue, 30 Jun 2015 16:01:11 +0100 Message-Id: <1435676471-30925-2-git-send-email-david.s.gordon@intel.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1435676471-30925-1-git-send-email-david.s.gordon@intel.com> References: <1435676471-30925-1-git-send-email-david.s.gordon@intel.com> Organization: Intel Corporation (UK) Ltd. - Co. Reg. #1134945 - Pipers Way, Swindon SN3 1RJ Subject: [Intel-gfx] [PATCH 2/2] drm/i915: Defer late hardware initialisation until first open X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-4.8 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP We can do less work during driver load by deferring some of it until the first time the device is opened; in particular, the function i915_gem_init_hw_late() introduced by the previous patch. This should allow the system to get out of the early single-threaded phase of system initialisation and into full multi-user mode somewhat quicker. In addition, we expect that by the time of the first open, not only the driver's software structures but also system-specific items such as filesystem mounting have been fully initialised, meaning that the late initialisation code can run in a much more complete environment than the driver_load stage presents. This can be important for embedded programmable devices that need firmware loaded from a file before they can be used. Signed-off-by: Dave Gordon Tested-By: Intel Graphics QA PRTS (Patch Regression Test System Contact: shuang.he@intel.com) --- drivers/gpu/drm/i915/i915_drv.h | 1 + drivers/gpu/drm/i915/i915_gem.c | 4 +++- drivers/gpu/drm/i915/i915_gem_context.c | 32 ++++++++++++++++++++++++++----- 3 files changed, 31 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index bc7c510..ba63804 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -1845,6 +1845,7 @@ struct drm_i915_private { /* hda/i915 audio component */ bool audio_component_registered; + bool contexts_ready; uint32_t hw_context_size; struct list_head context_list; diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c index 1887e60..0cb962f 100644 --- a/drivers/gpu/drm/i915/i915_gem.c +++ b/drivers/gpu/drm/i915/i915_gem.c @@ -5073,7 +5073,9 @@ i915_gem_init_hw(struct drm_device *dev) goto out; } - ret = i915_gem_init_hw_late(dev); + /* Don't do late init on the first time through here */ + if (dev_priv->contexts_ready) + ret = i915_gem_init_hw_late(dev); out: intel_uncore_forcewake_put(dev_priv, FORCEWAKE_ALL); diff --git a/drivers/gpu/drm/i915/i915_gem_context.c b/drivers/gpu/drm/i915/i915_gem_context.c index a7e58a8..917c867 100644 --- a/drivers/gpu/drm/i915/i915_gem_context.c +++ b/drivers/gpu/drm/i915/i915_gem_context.c @@ -438,23 +438,45 @@ static int context_idr_cleanup(int id, void *p, void *data) return 0; } +/* Complete any late initialisation here */ +static int i915_gem_context_first_open(struct drm_device *dev) +{ + struct drm_i915_private *dev_priv = dev->dev_private; + int ret; + + ret = i915_gem_init_hw_late(dev); + if (ret == 0) + dev_priv->contexts_ready = true; + + return ret; +} + int i915_gem_context_open(struct drm_device *dev, struct drm_file *file) { + struct drm_i915_private *dev_priv = dev->dev_private; struct drm_i915_file_private *file_priv = file->driver_priv; struct intel_context *ctx; + int ret = 0; idr_init(&file_priv->context_idr); mutex_lock(&dev->struct_mutex); - ctx = i915_gem_create_context(dev, file_priv); + + if (!dev_priv->contexts_ready) + ret = i915_gem_context_first_open(dev); + + if (ret == 0) { + ctx = i915_gem_create_context(dev, file_priv); + if (IS_ERR(ctx)) + ret = PTR_ERR(ctx); + } + mutex_unlock(&dev->struct_mutex); - if (IS_ERR(ctx)) { + if (ret) idr_destroy(&file_priv->context_idr); - return PTR_ERR(ctx); - } - return 0; + return ret; } void i915_gem_context_close(struct drm_device *dev, struct drm_file *file)