From patchwork Tue Jun 30 18:28:57 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Lespiau, Damien" X-Patchwork-Id: 6697981 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 153A69F1C1 for ; Tue, 30 Jun 2015 18:29:13 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 1AE5E20629 for ; Tue, 30 Jun 2015 18:29:12 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 2859A205CA for ; Tue, 30 Jun 2015 18:29:11 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id D002E6EA1B; Tue, 30 Jun 2015 11:29:09 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by gabe.freedesktop.org (Postfix) with ESMTP id 968DC6EA1A for ; Tue, 30 Jun 2015 11:29:08 -0700 (PDT) Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by fmsmga103.fm.intel.com with ESMTP; 30 Jun 2015 11:29:09 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.15,379,1432623600"; d="scan'208";a="737894719" Received: from amunshi-mobl4.amr.corp.intel.com (HELO strange.amr.corp.intel.com) ([10.254.100.153]) by fmsmga001.fm.intel.com with ESMTP; 30 Jun 2015 11:29:06 -0700 From: Damien Lespiau To: intel-gfx@lists.freedesktop.org Date: Tue, 30 Jun 2015 19:28:57 +0100 Message-Id: <1435688939-26523-5-git-send-email-damien.lespiau@intel.com> X-Mailer: git-send-email 2.1.0 In-Reply-To: <1435688939-26523-1-git-send-email-damien.lespiau@intel.com> References: <1435688939-26523-1-git-send-email-damien.lespiau@intel.com> Subject: [Intel-gfx] [PATCH 4/6] drm/i915/skl: Embed the CSR lock into its own structure X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-4.8 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP When we have a well defined structure, it's customary to put the lock protecting its fields inside. Signed-off-by: Damien Lespiau --- drivers/gpu/drm/i915/i915_dma.c | 1 - drivers/gpu/drm/i915/i915_drv.h | 5 ++--- drivers/gpu/drm/i915/intel_csr.c | 14 ++++++++------ 3 files changed, 10 insertions(+), 10 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c index c5349fa..1ebf0e1 100644 --- a/drivers/gpu/drm/i915/i915_dma.c +++ b/drivers/gpu/drm/i915/i915_dma.c @@ -820,7 +820,6 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags) spin_lock_init(&dev_priv->mmio_flip_lock); mutex_init(&dev_priv->sb_lock); mutex_init(&dev_priv->modeset_restore_lock); - mutex_init(&dev_priv->csr_lock); intel_pm_setup(dev); diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index e15cb56..64c5184 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -741,6 +741,8 @@ enum csr_state { }; struct intel_csr { + struct mutex lock; + const char *fw_path; __be32 *dmc_payload; uint32_t dmc_fw_size; @@ -1689,9 +1691,6 @@ struct drm_i915_private { struct intel_csr csr; - /* Display CSR-related protection */ - struct mutex csr_lock; - struct intel_gmbus gmbus[GMBUS_NUM_PINS]; /** gmbus_mutex protects against concurrent usage of the single hw gmbus diff --git a/drivers/gpu/drm/i915/intel_csr.c b/drivers/gpu/drm/i915/intel_csr.c index f83a2bf..d51cbae 100644 --- a/drivers/gpu/drm/i915/intel_csr.c +++ b/drivers/gpu/drm/i915/intel_csr.c @@ -211,9 +211,9 @@ enum csr_state intel_csr_load_status_get(struct drm_i915_private *dev_priv) { enum csr_state state; - mutex_lock(&dev_priv->csr_lock); + mutex_lock(&dev_priv->csr.lock); state = dev_priv->csr.state; - mutex_unlock(&dev_priv->csr_lock); + mutex_unlock(&dev_priv->csr.lock); return state; } @@ -228,9 +228,9 @@ enum csr_state intel_csr_load_status_get(struct drm_i915_private *dev_priv) void intel_csr_load_status_set(struct drm_i915_private *dev_priv, enum csr_state state) { - mutex_lock(&dev_priv->csr_lock); + mutex_lock(&dev_priv->csr.lock); dev_priv->csr.state = state; - mutex_unlock(&dev_priv->csr_lock); + mutex_unlock(&dev_priv->csr.lock); } /** @@ -252,7 +252,7 @@ void intel_csr_load_program(struct drm_device *dev) return; } - mutex_lock(&dev_priv->csr_lock); + mutex_lock(&dev_priv->csr.lock); fw_size = dev_priv->csr.dmc_fw_size; for (i = 0; i < fw_size; i++) I915_WRITE(CSR_PROGRAM_BASE + i * 4, @@ -264,7 +264,7 @@ void intel_csr_load_program(struct drm_device *dev) } dev_priv->csr.state = FW_LOADED; - mutex_unlock(&dev_priv->csr_lock); + mutex_unlock(&dev_priv->csr.lock); } static void finish_csr_load(const struct firmware *fw, void *context) @@ -429,6 +429,8 @@ void intel_csr_ucode_init(struct drm_device *dev) return; } + mutex_init(&dev_priv->csr.lock); + DRM_DEBUG_KMS("Loading %s\n", csr->fw_path); /*