| Message ID | 1435725395-4365-1-git-send-email-vandana.kannan@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On 7/1/2015 10:06 AM, Vandana Kannan wrote: > This patch contains changes based on 2 updates to the spec: > Port PLL VCO restriction raised up to 6700. > Port PLL now needs DCO amp override enable for all VCO frequencies. > > Signed-off-by: Vandana Kannan <vandana.kannan@intel.com> > --- > drivers/gpu/drm/i915/intel_ddi.c | 7 +++---- > drivers/gpu/drm/i915/intel_display.c | 2 +- > 2 files changed, 4 insertions(+), 5 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c > index 42c1487..677096d 100644 > --- a/drivers/gpu/drm/i915/intel_ddi.c > +++ b/drivers/gpu/drm/i915/intel_ddi.c > @@ -1495,8 +1495,8 @@ bxt_ddi_pll_select(struct intel_crtc *intel_crtc, > } > > dco_amp = 15; > - dcoampovr_en_h = 0; > - if (vco >= 6200000 && vco <= 6480000) { > + dcoampovr_en_h = 1; You dont need this variable now.. > + if (vco >= 6200000 && vco <= 6700000) { > prop_coef = 4; > int_coef = 9; > gain_ctl = 3; > @@ -1550,8 +1550,7 @@ bxt_ddi_pll_select(struct intel_crtc *intel_crtc, > > crtc_state->dpll_hw_state.pll8 = targ_cnt; > > - if (dcoampovr_en_h) > - crtc_state->dpll_hw_state.pll10 = PORT_PLL_DCO_AMP_OVR_EN_H; > + crtc_state->dpll_hw_state.pll10 = PORT_PLL_DCO_AMP_OVR_EN_H; > > crtc_state->dpll_hw_state.pll10 |= PORT_PLL_DCO_AMP(dco_amp); > > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c > index eb665d7..e04be45 100644 > --- a/drivers/gpu/drm/i915/intel_display.c > +++ b/drivers/gpu/drm/i915/intel_display.c > @@ -409,7 +409,7 @@ static const intel_limit_t intel_limits_chv = { > static const intel_limit_t intel_limits_bxt = { > /* FIXME: find real dot limits */ > .dot = { .min = 0, .max = INT_MAX }, > - .vco = { .min = 4800000, .max = 6480000 }, > + .vco = { .min = 4800000, .max = 6700000 }, > .n = { .min = 1, .max = 1 }, > .m1 = { .min = 2, .max = 2 }, > /* FIXME: find real m2 limits */ >
On 7/1/2015 9:51 AM, Jindal, Sonika wrote: > > > On 7/1/2015 10:06 AM, Vandana Kannan wrote: >> This patch contains changes based on 2 updates to the spec: >> Port PLL VCO restriction raised up to 6700. >> Port PLL now needs DCO amp override enable for all VCO frequencies. >> >> Signed-off-by: Vandana Kannan <vandana.kannan@intel.com> >> --- >> drivers/gpu/drm/i915/intel_ddi.c | 7 +++---- >> drivers/gpu/drm/i915/intel_display.c | 2 +- >> 2 files changed, 4 insertions(+), 5 deletions(-) >> >> diff --git a/drivers/gpu/drm/i915/intel_ddi.c >> b/drivers/gpu/drm/i915/intel_ddi.c >> index 42c1487..677096d 100644 >> --- a/drivers/gpu/drm/i915/intel_ddi.c >> +++ b/drivers/gpu/drm/i915/intel_ddi.c >> @@ -1495,8 +1495,8 @@ bxt_ddi_pll_select(struct intel_crtc *intel_crtc, >> } >> >> dco_amp = 15; >> - dcoampovr_en_h = 0; >> - if (vco >= 6200000 && vco <= 6480000) { >> + dcoampovr_en_h = 1; > You dont need this variable now.. > Agreed, will make the change. - Vandana >> + if (vco >= 6200000 && vco <= 6700000) { >> prop_coef = 4; >> int_coef = 9; >> gain_ctl = 3; >> @@ -1550,8 +1550,7 @@ bxt_ddi_pll_select(struct intel_crtc *intel_crtc, >> >> crtc_state->dpll_hw_state.pll8 = targ_cnt; >> >> - if (dcoampovr_en_h) >> - crtc_state->dpll_hw_state.pll10 = PORT_PLL_DCO_AMP_OVR_EN_H; >> + crtc_state->dpll_hw_state.pll10 = PORT_PLL_DCO_AMP_OVR_EN_H; >> >> crtc_state->dpll_hw_state.pll10 |= PORT_PLL_DCO_AMP(dco_amp); >> >> diff --git a/drivers/gpu/drm/i915/intel_display.c >> b/drivers/gpu/drm/i915/intel_display.c >> index eb665d7..e04be45 100644 >> --- a/drivers/gpu/drm/i915/intel_display.c >> +++ b/drivers/gpu/drm/i915/intel_display.c >> @@ -409,7 +409,7 @@ static const intel_limit_t intel_limits_chv = { >> static const intel_limit_t intel_limits_bxt = { >> /* FIXME: find real dot limits */ >> .dot = { .min = 0, .max = INT_MAX }, >> - .vco = { .min = 4800000, .max = 6480000 }, >> + .vco = { .min = 4800000, .max = 6700000 }, >> .n = { .min = 1, .max = 1 }, >> .m1 = { .min = 2, .max = 2 }, >> /* FIXME: find real m2 limits */ >>
Tested-By: Intel Graphics QA PRTS (Patch Regression Test System Contact: shuang.he@intel.com)
Task id: 6692
-------------------------------------Summary-------------------------------------
Platform Delta drm-intel-nightly Series Applied
ILK 302/302 302/302
SNB 312/316 312/316
IVB 343/343 343/343
BYT -2 287/287 285/287
HSW 380/380 380/380
-------------------------------------Detailed-------------------------------------
Platform Test drm-intel-nightly Series Applied
*BYT igt@gem_partial_pwrite_pread@reads PASS(1) FAIL(1)
*BYT igt@gem_tiled_partial_pwrite_pread@reads PASS(1) FAIL(1)
Note: You need to pay more attention to line start with '*'
diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c index 42c1487..677096d 100644 --- a/drivers/gpu/drm/i915/intel_ddi.c +++ b/drivers/gpu/drm/i915/intel_ddi.c @@ -1495,8 +1495,8 @@ bxt_ddi_pll_select(struct intel_crtc *intel_crtc, } dco_amp = 15; - dcoampovr_en_h = 0; - if (vco >= 6200000 && vco <= 6480000) { + dcoampovr_en_h = 1; + if (vco >= 6200000 && vco <= 6700000) { prop_coef = 4; int_coef = 9; gain_ctl = 3; @@ -1550,8 +1550,7 @@ bxt_ddi_pll_select(struct intel_crtc *intel_crtc, crtc_state->dpll_hw_state.pll8 = targ_cnt; - if (dcoampovr_en_h) - crtc_state->dpll_hw_state.pll10 = PORT_PLL_DCO_AMP_OVR_EN_H; + crtc_state->dpll_hw_state.pll10 = PORT_PLL_DCO_AMP_OVR_EN_H; crtc_state->dpll_hw_state.pll10 |= PORT_PLL_DCO_AMP(dco_amp); diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index eb665d7..e04be45 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -409,7 +409,7 @@ static const intel_limit_t intel_limits_chv = { static const intel_limit_t intel_limits_bxt = { /* FIXME: find real dot limits */ .dot = { .min = 0, .max = INT_MAX }, - .vco = { .min = 4800000, .max = 6480000 }, + .vco = { .min = 4800000, .max = 6700000 }, .n = { .min = 1, .max = 1 }, .m1 = { .min = 2, .max = 2 }, /* FIXME: find real m2 limits */
This patch contains changes based on 2 updates to the spec: Port PLL VCO restriction raised up to 6700. Port PLL now needs DCO amp override enable for all VCO frequencies. Signed-off-by: Vandana Kannan <vandana.kannan@intel.com> --- drivers/gpu/drm/i915/intel_ddi.c | 7 +++---- drivers/gpu/drm/i915/intel_display.c | 2 +- 2 files changed, 4 insertions(+), 5 deletions(-)