diff mbox

[v2] drm/i915/bxt: BUNs related to port PLL

Message ID 1435728864-19589-1-git-send-email-vandana.kannan@intel.com (mailing list archive)
State New, archived
Headers show

Commit Message

vandana.kannan@intel.com July 1, 2015, 5:34 a.m. UTC
This patch contains changes based on 2 updates to the spec:
Port PLL VCO restriction raised up to 6700.
Port PLL now needs DCO amp override enable for all VCO frequencies.

v2: Sonika's review comment addressed
	- dcoampovr_en_h variable not required
Based on a discussion with Siva, the following changes have been made.
	- replace dco_amp var with #define BXT_DCO_AMPLITUDE
	- set pll10 in a single assignment

Signed-off-by: Vandana Kannan <vandana.kannan@intel.com>
---
 drivers/gpu/drm/i915/intel_ddi.c     | 16 ++++++----------
 drivers/gpu/drm/i915/intel_display.c |  2 +-
 2 files changed, 7 insertions(+), 11 deletions(-)

Comments

Sivakumar Thulasimani July 1, 2015, 10:18 a.m. UTC | #1
On 7/1/2015 11:04 AM, Vandana Kannan wrote:
> This patch contains changes based on 2 updates to the spec:
> Port PLL VCO restriction raised up to 6700.
> Port PLL now needs DCO amp override enable for all VCO frequencies.
>
> v2: Sonika's review comment addressed
> 	- dcoampovr_en_h variable not required
> Based on a discussion with Siva, the following changes have been made.
> 	- replace dco_amp var with #define BXT_DCO_AMPLITUDE
> 	- set pll10 in a single assignment
>
> Signed-off-by: Vandana Kannan <vandana.kannan@intel.com>
> ---
>   drivers/gpu/drm/i915/intel_ddi.c     | 16 ++++++----------
>   drivers/gpu/drm/i915/intel_display.c |  2 +-
>   2 files changed, 7 insertions(+), 11 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
> index 42c1487..1eadc14 100644
> --- a/drivers/gpu/drm/i915/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/intel_ddi.c
> @@ -1445,6 +1445,8 @@ static const struct bxt_clk_div bxt_dp_clk_val[] = {
>   	{432000, 3, 1, 32, 1677722, 1, 1}
>   };
>   
> +#define BXT_DCO_AMPLITUDE	15
> +
can this be moved to i915_reg.h along with other #defines relating to 
PORT_PLL_10_A?
>   static bool
>   bxt_ddi_pll_select(struct intel_crtc *intel_crtc,
>   		   struct intel_crtc_state *crtc_state,
> @@ -1455,7 +1457,7 @@ bxt_ddi_pll_select(struct intel_crtc *intel_crtc,
>   	struct bxt_clk_div clk_div = {0};
>   	int vco = 0;
>   	uint32_t prop_coef, int_coef, gain_ctl, targ_cnt;
> -	uint32_t dcoampovr_en_h, dco_amp, lanestagger;
> +	uint32_t lanestagger;
>   
>   	if (intel_encoder->type == INTEL_OUTPUT_HDMI) {
>   		intel_clock_t best_clock;
> @@ -1494,9 +1496,7 @@ bxt_ddi_pll_select(struct intel_crtc *intel_crtc,
>   		vco = clock * 10 / 2 * clk_div.p1 * clk_div.p2;
>   	}
>   
> -	dco_amp = 15;
> -	dcoampovr_en_h = 0;
> -	if (vco >= 6200000 && vco <= 6480000) {
> +	if (vco >= 6200000 && vco <= 6700000) {
>   		prop_coef = 4;
>   		int_coef = 9;
>   		gain_ctl = 3;
> @@ -1507,8 +1507,6 @@ bxt_ddi_pll_select(struct intel_crtc *intel_crtc,
>   		int_coef = 11;
>   		gain_ctl = 3;
>   		targ_cnt = 9;
> -		if (vco >= 4800000 && vco < 5400000)
> -			dcoampovr_en_h = 1;
>   	} else if (vco == 5400000) {
>   		prop_coef = 3;
>   		int_coef = 8;
> @@ -1550,10 +1548,8 @@ bxt_ddi_pll_select(struct intel_crtc *intel_crtc,
>   
>   	crtc_state->dpll_hw_state.pll8 = targ_cnt;
>   
> -	if (dcoampovr_en_h)
> -		crtc_state->dpll_hw_state.pll10 = PORT_PLL_DCO_AMP_OVR_EN_H;
> -
> -	crtc_state->dpll_hw_state.pll10 |= PORT_PLL_DCO_AMP(dco_amp);
> +	crtc_state->dpll_hw_state.pll10 = PORT_PLL_DCO_AMP(BXT_DCO_AMPLITUDE)
> +						| PORT_PLL_DCO_AMP_OVR_EN_H;
>   
>   	crtc_state->dpll_hw_state.pcsdw12 =
>   		LANESTAGGER_STRAP_OVRD | lanestagger;
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index eb665d7..e04be45 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -409,7 +409,7 @@ static const intel_limit_t intel_limits_chv = {
>   static const intel_limit_t intel_limits_bxt = {
>   	/* FIXME: find real dot limits */
>   	.dot = { .min = 0, .max = INT_MAX },
> -	.vco = { .min = 4800000, .max = 6480000 },
> +	.vco = { .min = 4800000, .max = 6700000 },
>   	.n = { .min = 1, .max = 1 },
>   	.m1 = { .min = 2, .max = 2 },
>   	/* FIXME: find real m2 limits */
vandana.kannan@intel.com July 1, 2015, 10:42 a.m. UTC | #2
On 7/1/2015 3:48 PM, Sivakumar Thulasimani wrote:
>
>
> On 7/1/2015 11:04 AM, Vandana Kannan wrote:
>> This patch contains changes based on 2 updates to the spec:
>> Port PLL VCO restriction raised up to 6700.
>> Port PLL now needs DCO amp override enable for all VCO frequencies.
>>
>> v2: Sonika's review comment addressed
>>     - dcoampovr_en_h variable not required
>> Based on a discussion with Siva, the following changes have been made.
>>     - replace dco_amp var with #define BXT_DCO_AMPLITUDE
>>     - set pll10 in a single assignment
>>
>> Signed-off-by: Vandana Kannan <vandana.kannan@intel.com>
>> ---
>>   drivers/gpu/drm/i915/intel_ddi.c     | 16 ++++++----------
>>   drivers/gpu/drm/i915/intel_display.c |  2 +-
>>   2 files changed, 7 insertions(+), 11 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/intel_ddi.c
>> b/drivers/gpu/drm/i915/intel_ddi.c
>> index 42c1487..1eadc14 100644
>> --- a/drivers/gpu/drm/i915/intel_ddi.c
>> +++ b/drivers/gpu/drm/i915/intel_ddi.c
>> @@ -1445,6 +1445,8 @@ static const struct bxt_clk_div bxt_dp_clk_val[]
>> = {
>>       {432000, 3, 1, 32, 1677722, 1, 1}
>>   };
>> +#define BXT_DCO_AMPLITUDE    15
>> +
> can this be moved to i915_reg.h along with other #defines relating to
> PORT_PLL_10_A?
Hi Siva,
Since the requirement of BXT_DCO_AMPLITUDE is local to this 
function/file, I added it here instead of i915_reg.h. Following the 
other #defines in this file, like REF_MIN, REF_MAX.
- Vandana
>>   static bool
>>   bxt_ddi_pll_select(struct intel_crtc *intel_crtc,
>>              struct intel_crtc_state *crtc_state,
>> @@ -1455,7 +1457,7 @@ bxt_ddi_pll_select(struct intel_crtc *intel_crtc,
>>       struct bxt_clk_div clk_div = {0};
>>       int vco = 0;
>>       uint32_t prop_coef, int_coef, gain_ctl, targ_cnt;
>> -    uint32_t dcoampovr_en_h, dco_amp, lanestagger;
>> +    uint32_t lanestagger;
>>       if (intel_encoder->type == INTEL_OUTPUT_HDMI) {
>>           intel_clock_t best_clock;
>> @@ -1494,9 +1496,7 @@ bxt_ddi_pll_select(struct intel_crtc *intel_crtc,
>>           vco = clock * 10 / 2 * clk_div.p1 * clk_div.p2;
>>       }
>> -    dco_amp = 15;
>> -    dcoampovr_en_h = 0;
>> -    if (vco >= 6200000 && vco <= 6480000) {
>> +    if (vco >= 6200000 && vco <= 6700000) {
>>           prop_coef = 4;
>>           int_coef = 9;
>>           gain_ctl = 3;
>> @@ -1507,8 +1507,6 @@ bxt_ddi_pll_select(struct intel_crtc *intel_crtc,
>>           int_coef = 11;
>>           gain_ctl = 3;
>>           targ_cnt = 9;
>> -        if (vco >= 4800000 && vco < 5400000)
>> -            dcoampovr_en_h = 1;
>>       } else if (vco == 5400000) {
>>           prop_coef = 3;
>>           int_coef = 8;
>> @@ -1550,10 +1548,8 @@ bxt_ddi_pll_select(struct intel_crtc *intel_crtc,
>>       crtc_state->dpll_hw_state.pll8 = targ_cnt;
>> -    if (dcoampovr_en_h)
>> -        crtc_state->dpll_hw_state.pll10 = PORT_PLL_DCO_AMP_OVR_EN_H;
>> -
>> -    crtc_state->dpll_hw_state.pll10 |= PORT_PLL_DCO_AMP(dco_amp);
>> +    crtc_state->dpll_hw_state.pll10 =
>> PORT_PLL_DCO_AMP(BXT_DCO_AMPLITUDE)
>> +                        | PORT_PLL_DCO_AMP_OVR_EN_H;
>>       crtc_state->dpll_hw_state.pcsdw12 =
>>           LANESTAGGER_STRAP_OVRD | lanestagger;
>> diff --git a/drivers/gpu/drm/i915/intel_display.c
>> b/drivers/gpu/drm/i915/intel_display.c
>> index eb665d7..e04be45 100644
>> --- a/drivers/gpu/drm/i915/intel_display.c
>> +++ b/drivers/gpu/drm/i915/intel_display.c
>> @@ -409,7 +409,7 @@ static const intel_limit_t intel_limits_chv = {
>>   static const intel_limit_t intel_limits_bxt = {
>>       /* FIXME: find real dot limits */
>>       .dot = { .min = 0, .max = INT_MAX },
>> -    .vco = { .min = 4800000, .max = 6480000 },
>> +    .vco = { .min = 4800000, .max = 6700000 },
>>       .n = { .min = 1, .max = 1 },
>>       .m1 = { .min = 2, .max = 2 },
>>       /* FIXME: find real m2 limits */
>
Shuang He July 2, 2015, 11:39 p.m. UTC | #3
Tested-By: Intel Graphics QA PRTS (Patch Regression Test System Contact: shuang.he@intel.com)
Task id: 6693
-------------------------------------Summary-------------------------------------
Platform          Delta          drm-intel-nightly          Series Applied
ILK                                  302/302              302/302
SNB                                  312/316              312/316
IVB                                  343/343              343/343
BYT                 -1              287/287              286/287
HSW                                  380/380              380/380
-------------------------------------Detailed-------------------------------------
Platform  Test                                drm-intel-nightly          Series Applied
*BYT  igt@gem_partial_pwrite_pread@reads-uncached      PASS(1)      FAIL(1)
Note: You need to pay more attention to line start with '*'
diff mbox

Patch

diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
index 42c1487..1eadc14 100644
--- a/drivers/gpu/drm/i915/intel_ddi.c
+++ b/drivers/gpu/drm/i915/intel_ddi.c
@@ -1445,6 +1445,8 @@  static const struct bxt_clk_div bxt_dp_clk_val[] = {
 	{432000, 3, 1, 32, 1677722, 1, 1}
 };
 
+#define BXT_DCO_AMPLITUDE	15
+
 static bool
 bxt_ddi_pll_select(struct intel_crtc *intel_crtc,
 		   struct intel_crtc_state *crtc_state,
@@ -1455,7 +1457,7 @@  bxt_ddi_pll_select(struct intel_crtc *intel_crtc,
 	struct bxt_clk_div clk_div = {0};
 	int vco = 0;
 	uint32_t prop_coef, int_coef, gain_ctl, targ_cnt;
-	uint32_t dcoampovr_en_h, dco_amp, lanestagger;
+	uint32_t lanestagger;
 
 	if (intel_encoder->type == INTEL_OUTPUT_HDMI) {
 		intel_clock_t best_clock;
@@ -1494,9 +1496,7 @@  bxt_ddi_pll_select(struct intel_crtc *intel_crtc,
 		vco = clock * 10 / 2 * clk_div.p1 * clk_div.p2;
 	}
 
-	dco_amp = 15;
-	dcoampovr_en_h = 0;
-	if (vco >= 6200000 && vco <= 6480000) {
+	if (vco >= 6200000 && vco <= 6700000) {
 		prop_coef = 4;
 		int_coef = 9;
 		gain_ctl = 3;
@@ -1507,8 +1507,6 @@  bxt_ddi_pll_select(struct intel_crtc *intel_crtc,
 		int_coef = 11;
 		gain_ctl = 3;
 		targ_cnt = 9;
-		if (vco >= 4800000 && vco < 5400000)
-			dcoampovr_en_h = 1;
 	} else if (vco == 5400000) {
 		prop_coef = 3;
 		int_coef = 8;
@@ -1550,10 +1548,8 @@  bxt_ddi_pll_select(struct intel_crtc *intel_crtc,
 
 	crtc_state->dpll_hw_state.pll8 = targ_cnt;
 
-	if (dcoampovr_en_h)
-		crtc_state->dpll_hw_state.pll10 = PORT_PLL_DCO_AMP_OVR_EN_H;
-
-	crtc_state->dpll_hw_state.pll10 |= PORT_PLL_DCO_AMP(dco_amp);
+	crtc_state->dpll_hw_state.pll10 = PORT_PLL_DCO_AMP(BXT_DCO_AMPLITUDE)
+						| PORT_PLL_DCO_AMP_OVR_EN_H;
 
 	crtc_state->dpll_hw_state.pcsdw12 =
 		LANESTAGGER_STRAP_OVRD | lanestagger;
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index eb665d7..e04be45 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -409,7 +409,7 @@  static const intel_limit_t intel_limits_chv = {
 static const intel_limit_t intel_limits_bxt = {
 	/* FIXME: find real dot limits */
 	.dot = { .min = 0, .max = INT_MAX },
-	.vco = { .min = 4800000, .max = 6480000 },
+	.vco = { .min = 4800000, .max = 6700000 },
 	.n = { .min = 1, .max = 1 },
 	.m1 = { .min = 2, .max = 2 },
 	/* FIXME: find real m2 limits */