From patchwork Fri Jul 3 11:35:52 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mika Kahola X-Patchwork-Id: 6714481 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id DB7D59F38C for ; Fri, 3 Jul 2015 11:34:15 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 13621207F8 for ; Fri, 3 Jul 2015 11:34:15 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 26C25207F6 for ; Fri, 3 Jul 2015 11:34:14 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 974334A05F; Fri, 3 Jul 2015 04:34:13 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by gabe.freedesktop.org (Postfix) with ESMTP id 34A6A4A058 for ; Fri, 3 Jul 2015 04:34:12 -0700 (PDT) Received: from orsmga001.jf.intel.com ([10.7.209.18]) by fmsmga103.fm.intel.com with ESMTP; 03 Jul 2015 04:34:12 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.15,399,1432623600"; d="scan'208";a="722349256" Received: from sorvi.fi.intel.com ([10.237.72.63]) by orsmga001.jf.intel.com with ESMTP; 03 Jul 2015 04:34:11 -0700 From: Mika Kahola To: intel-gfx@lists.freedesktop.org Date: Fri, 3 Jul 2015 14:35:52 +0300 Message-Id: <1435923357-3821-5-git-send-email-mika.kahola@intel.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1435923357-3821-1-git-send-email-mika.kahola@intel.com> References: <1435923357-3821-1-git-send-email-mika.kahola@intel.com> Subject: [Intel-gfx] [PATCH 4/9] drm/i915: Check pixel clock when setting mode for DVO X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-4.8 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP It is possible the we request to have a mode that has higher pixel clock than our HW can support. This patch checks if requested pixel clock is lower than the one supported by the HW. The requested mode is discarded if we cannot support the requested pixel clock. This patch applies to DVO. Signed-off-by: Mika Kahola --- drivers/gpu/drm/i915/intel_dvo.c | 21 ++++++++++++++++++++- 1 file changed, 20 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/intel_dvo.c b/drivers/gpu/drm/i915/intel_dvo.c index ece5bd7..82cbcea 100644 --- a/drivers/gpu/drm/i915/intel_dvo.c +++ b/drivers/gpu/drm/i915/intel_dvo.c @@ -240,16 +240,35 @@ static void intel_dvo_dpms(struct drm_connector *connector, int mode) intel_modeset_check_state(connector->dev); } +static int +intel_dvo_max_pixclk(struct intel_dvo *intel_dvo) +{ + struct drm_i915_private *dev_priv = intel_dvo->dev.dev_priv; + struct intel_crtc *intel_crtc = to_intel_crtc(intel_dvo->base.base.crtc); + + if (IS_CHERRYVIEW(dev_priv)) + return DIV_ROUND_UP(dev_priv->max_cdclk_freq * 100, 95); + else if (IS_VALLEYVIEW(dev_priv)) + return DIV_ROUND_UP(dev_priv->max_cdclk_freq * 100, 90); + else if (IS_BROADWELL(dev_priv) && intel_crtc->config->ips_enabled) + return DIV_ROUND_UP(dev_priv->max_cdclk_freq * 100, 95); + else + return dev_priv->max_cdclk_freq; +} + static enum drm_mode_status intel_dvo_mode_valid(struct drm_connector *connector, struct drm_display_mode *mode) { struct intel_dvo *intel_dvo = intel_attached_dvo(connector); + int max_pixclk = intel_dvo_max_pixclk(intel_dvo); if (mode->flags & DRM_MODE_FLAG_DBLSCAN) return MODE_NO_DBLESCAN; - /* XXX: Validate clock range */ + /* Validate clock range */ + if (mode->clock > max_pixclk) + return MODE_PANEL; if (intel_dvo->panel_fixed_mode) { if (mode->hdisplay > intel_dvo->panel_fixed_mode->hdisplay)