From patchwork Tue Jul 7 18:26:03 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paulo Zanoni X-Patchwork-Id: 6736841 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 52C8BC05AC for ; Tue, 7 Jul 2015 18:26:58 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 43717205FD for ; Tue, 7 Jul 2015 18:26:57 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 37D4C20668 for ; Tue, 7 Jul 2015 18:26:56 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 9E3906EA2B; Tue, 7 Jul 2015 11:26:55 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail-qg0-f51.google.com (mail-qg0-f51.google.com [209.85.192.51]) by gabe.freedesktop.org (Postfix) with ESMTPS id F113E6EA2B for ; Tue, 7 Jul 2015 11:26:53 -0700 (PDT) Received: by qgii30 with SMTP id i30so88595646qgi.1 for ; Tue, 07 Jul 2015 11:26:53 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=i4aTDQZKC+47FgECAUU3MLlbfcBZXrxUmSFKeYNn00Y=; b=V2ya90F2R6FIlt17siFqeYMOqfFsp8FZ8yieD2mUCrlOHsVFu/7aE8nO0vXPdOSDjo K/EFXkTAzkPUU6FYuKhdYXOyBOx6M3ROYA0zXBmpfiolH/GyVYTuIkJ+l5OVhmhAsryH vfuFi+kOrdGg216KSt4P/N5OpZ0ooCuWX9+SnIhqWj8vVyGRUGap9YQvWNEwQTzuE+uE xNa8KlBwj5/aGLjkqzBX0gmcfjD8lftHmjR3zwnp444rA+P/I3ahOeUzHVuGrGKcke9K 6LryP/nV8iRW9f2+XWg/FwTP+SeMuaHqtFcBqq6rJL1rpoKia0F7dg5veaBbCXXIyCt+ peng== X-Received: by 10.140.23.147 with SMTP id 19mr9052947qgp.84.1436293613192; Tue, 07 Jul 2015 11:26:53 -0700 (PDT) Received: from localhost.localdomain (r130-pw-tresbarras.ibys.com.br. [189.76.1.243]) by mx.google.com with ESMTPSA id h81sm11588457qkh.34.2015.07.07.11.26.51 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 07 Jul 2015 11:26:52 -0700 (PDT) From: Paulo Zanoni To: intel-gfx@lists.freedesktop.org Date: Tue, 7 Jul 2015 15:26:03 -0300 Message-Id: <1436293568-1674-2-git-send-email-przanoni@gmail.com> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1436293568-1674-1-git-send-email-przanoni@gmail.com> References: <1436293568-1674-1-git-send-email-przanoni@gmail.com> Cc: Paulo Zanoni Subject: [Intel-gfx] [PATCH 1/6] drm/i915: move FBC vfuncs to struct i915_fbc X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-4.9 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, T_DKIM_INVALID, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Paulo Zanoni Because it makes more sense there, IMHO. Signed-off-by: Paulo Zanoni --- drivers/gpu/drm/i915/i915_drv.h | 7 +++--- drivers/gpu/drm/i915/intel_display.c | 4 ++-- drivers/gpu/drm/i915/intel_fbc.c | 44 ++++++++++++++++++------------------ 3 files changed, 28 insertions(+), 27 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 464b28d..79d7ece 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -598,9 +598,6 @@ struct intel_limit; struct dpll; struct drm_i915_display_funcs { - bool (*fbc_enabled)(struct drm_device *dev); - void (*enable_fbc)(struct drm_crtc *crtc); - void (*disable_fbc)(struct drm_device *dev); int (*get_display_clock_speed)(struct drm_device *dev); int (*get_fifo_size)(struct drm_device *dev, int plane); /** @@ -939,6 +936,10 @@ struct i915_fbc { FBC_CHIP_DEFAULT, /* disabled by default on this chip */ FBC_ROTATION, /* rotation is not supported */ } no_fbc_reason; + + bool (*fbc_enabled)(struct drm_device *dev); + void (*enable_fbc)(struct drm_crtc *crtc); + void (*disable_fbc)(struct drm_device *dev); }; /** diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 3c2425f..aefcf02 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -3134,8 +3134,8 @@ intel_pipe_set_base_atomic(struct drm_crtc *crtc, struct drm_framebuffer *fb, struct drm_device *dev = crtc->dev; struct drm_i915_private *dev_priv = dev->dev_private; - if (dev_priv->display.disable_fbc) - dev_priv->display.disable_fbc(dev); + if (dev_priv->fbc.disable_fbc) + dev_priv->fbc.disable_fbc(dev); dev_priv->display.update_primary_plane(crtc, fb, x, y); diff --git a/drivers/gpu/drm/i915/intel_fbc.c b/drivers/gpu/drm/i915/intel_fbc.c index 65f08e3..07ea5b3 100644 --- a/drivers/gpu/drm/i915/intel_fbc.c +++ b/drivers/gpu/drm/i915/intel_fbc.c @@ -341,7 +341,7 @@ static void intel_fbc_work_fn(struct work_struct *__work) * the prior work. */ if (work->crtc->primary->fb == work->fb) { - dev_priv->display.enable_fbc(work->crtc); + dev_priv->fbc.enable_fbc(work->crtc); dev_priv->fbc.crtc = to_intel_crtc(work->crtc); dev_priv->fbc.fb_id = work->crtc->primary->fb->base.id; @@ -393,7 +393,7 @@ static void intel_fbc_enable(struct drm_crtc *crtc) work = kzalloc(sizeof(*work), GFP_KERNEL); if (work == NULL) { DRM_ERROR("Failed to allocate FBC work structure\n"); - dev_priv->display.enable_fbc(crtc); + dev_priv->fbc.enable_fbc(crtc); return; } @@ -427,7 +427,7 @@ static void __intel_fbc_disable(struct drm_device *dev) intel_fbc_cancel_work(dev_priv); - dev_priv->display.disable_fbc(dev); + dev_priv->fbc.disable_fbc(dev); dev_priv->fbc.crtc = NULL; } @@ -441,7 +441,7 @@ void intel_fbc_disable(struct drm_device *dev) { struct drm_i915_private *dev_priv = dev->dev_private; - if (!dev_priv->display.enable_fbc) + if (!dev_priv->fbc.enable_fbc) return; mutex_lock(&dev_priv->fbc.lock); @@ -460,7 +460,7 @@ void intel_fbc_disable_crtc(struct intel_crtc *crtc) struct drm_device *dev = crtc->base.dev; struct drm_i915_private *dev_priv = dev->dev_private; - if (!dev_priv->display.enable_fbc) + if (!dev_priv->fbc.enable_fbc) return; mutex_lock(&dev_priv->fbc.lock); @@ -661,7 +661,7 @@ void intel_fbc_cleanup_cfb(struct drm_device *dev) { struct drm_i915_private *dev_priv = dev->dev_private; - if (!dev_priv->display.enable_fbc) + if (!dev_priv->fbc.enable_fbc) return; mutex_lock(&dev_priv->fbc.lock); @@ -857,7 +857,7 @@ void intel_fbc_update(struct drm_device *dev) { struct drm_i915_private *dev_priv = dev->dev_private; - if (!dev_priv->display.enable_fbc) + if (!dev_priv->fbc.enable_fbc) return; mutex_lock(&dev_priv->fbc.lock); @@ -872,7 +872,7 @@ void intel_fbc_invalidate(struct drm_i915_private *dev_priv, struct drm_device *dev = dev_priv->dev; unsigned int fbc_bits; - if (!dev_priv->display.enable_fbc) + if (!dev_priv->fbc.enable_fbc) return; if (origin == ORIGIN_GTT) @@ -901,7 +901,7 @@ void intel_fbc_flush(struct drm_i915_private *dev_priv, { struct drm_device *dev = dev_priv->dev; - if (!dev_priv->display.enable_fbc) + if (!dev_priv->fbc.enable_fbc) return; mutex_lock(&dev_priv->fbc.lock); @@ -945,25 +945,25 @@ void intel_fbc_init(struct drm_i915_private *dev_priv) } if (INTEL_INFO(dev_priv)->gen >= 7) { - dev_priv->display.fbc_enabled = ilk_fbc_enabled; - dev_priv->display.enable_fbc = gen7_fbc_enable; - dev_priv->display.disable_fbc = ilk_fbc_disable; + dev_priv->fbc.fbc_enabled = ilk_fbc_enabled; + dev_priv->fbc.enable_fbc = gen7_fbc_enable; + dev_priv->fbc.disable_fbc = ilk_fbc_disable; } else if (INTEL_INFO(dev_priv)->gen >= 5) { - dev_priv->display.fbc_enabled = ilk_fbc_enabled; - dev_priv->display.enable_fbc = ilk_fbc_enable; - dev_priv->display.disable_fbc = ilk_fbc_disable; + dev_priv->fbc.fbc_enabled = ilk_fbc_enabled; + dev_priv->fbc.enable_fbc = ilk_fbc_enable; + dev_priv->fbc.disable_fbc = ilk_fbc_disable; } else if (IS_GM45(dev_priv)) { - dev_priv->display.fbc_enabled = g4x_fbc_enabled; - dev_priv->display.enable_fbc = g4x_fbc_enable; - dev_priv->display.disable_fbc = g4x_fbc_disable; + dev_priv->fbc.fbc_enabled = g4x_fbc_enabled; + dev_priv->fbc.enable_fbc = g4x_fbc_enable; + dev_priv->fbc.disable_fbc = g4x_fbc_disable; } else { - dev_priv->display.fbc_enabled = i8xx_fbc_enabled; - dev_priv->display.enable_fbc = i8xx_fbc_enable; - dev_priv->display.disable_fbc = i8xx_fbc_disable; + dev_priv->fbc.fbc_enabled = i8xx_fbc_enabled; + dev_priv->fbc.enable_fbc = i8xx_fbc_enable; + dev_priv->fbc.disable_fbc = i8xx_fbc_disable; /* This value was pulled out of someone's hat */ I915_WRITE(FBC_CONTROL, 500 << FBC_CTL_INTERVAL_SHIFT); } - dev_priv->fbc.enabled = dev_priv->display.fbc_enabled(dev_priv->dev); + dev_priv->fbc.enabled = dev_priv->fbc.fbc_enabled(dev_priv->dev); }