From patchwork Thu Jul 30 06:49:33 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mika Kahola X-Patchwork-Id: 6898861 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 26285C05AD for ; Thu, 30 Jul 2015 06:47:56 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 4B4E0200E6 for ; Thu, 30 Jul 2015 06:47:55 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 6AB532052A for ; Thu, 30 Jul 2015 06:47:54 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id C6C9B6E5DD; Wed, 29 Jul 2015 23:47:53 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by gabe.freedesktop.org (Postfix) with ESMTP id C2C676E161 for ; Wed, 29 Jul 2015 23:47:40 -0700 (PDT) Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by orsmga103.jf.intel.com with ESMTP; 29 Jul 2015 23:47:40 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.15,575,1432623600"; d="scan'208";a="758182992" Received: from sorvi.fi.intel.com ([10.237.72.58]) by fmsmga001.fm.intel.com with ESMTP; 29 Jul 2015 23:47:39 -0700 From: Mika Kahola To: intel-gfx@lists.freedesktop.org Date: Thu, 30 Jul 2015 09:49:33 +0300 Message-Id: <1438238978-10638-7-git-send-email-mika.kahola@intel.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1438238978-10638-1-git-send-email-mika.kahola@intel.com> References: <1438238978-10638-1-git-send-email-mika.kahola@intel.com> Subject: [Intel-gfx] [PATCH v2 06/11] drm/i915: DSI pixel clock check X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-5.6 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP It is possible the we request to have a mode that has higher pixel clock than our HW can support. This patch checks if requested pixel clock is lower than the one supported by the HW. The requested mode is discarded if we cannot support the requested pixel clock. This patch applies to DSI. V2: - removed computation for max pixel clock Signed-off-by: Mika Kahola --- drivers/gpu/drm/i915/intel_dsi.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_dsi.c b/drivers/gpu/drm/i915/intel_dsi.c index 18dd7d7..2882978 100644 --- a/drivers/gpu/drm/i915/intel_dsi.c +++ b/drivers/gpu/drm/i915/intel_dsi.c @@ -654,6 +654,11 @@ intel_dsi_mode_valid(struct drm_connector *connector, { struct intel_connector *intel_connector = to_intel_connector(connector); struct drm_display_mode *fixed_mode = intel_connector->panel.fixed_mode; + struct intel_encoder *intel_encoder = intel_connector->encoder; + struct intel_dsi *intel_dsi = enc_to_intel_dsi(&intel_encoder->base); + struct drm_device *dev = intel_dsi->base.base.dev; + struct drm_i915_private *dev_priv = to_i915(dev); + int max_pixclk = dev_priv->max_dotclk; DRM_DEBUG_KMS("\n"); @@ -669,6 +674,9 @@ intel_dsi_mode_valid(struct drm_connector *connector, return MODE_PANEL; } + if (mode->clock > max_pixclk) + return MODE_CLOCK_HIGH; + return MODE_OK; }