From patchwork Fri Jul 31 13:04:08 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Patrik Jakobsson X-Patchwork-Id: 6911171 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 75DC39F358 for ; Fri, 31 Jul 2015 13:04:25 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id AD249203DB for ; Fri, 31 Jul 2015 13:04:21 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id CAA6B20618 for ; Fri, 31 Jul 2015 13:04:17 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 50CA66ED65; Fri, 31 Jul 2015 06:04:17 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by gabe.freedesktop.org (Postfix) with ESMTP id DA1866ED65 for ; Fri, 31 Jul 2015 06:04:15 -0700 (PDT) Received: from orsmga003.jf.intel.com ([10.7.209.27]) by orsmga103.jf.intel.com with ESMTP; 31 Jul 2015 06:04:01 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.15,584,1432623600"; d="scan'208";a="616756200" Received: from patrik-desktop.isw.intel.com ([10.237.180.143]) by orsmga003.jf.intel.com with ESMTP; 31 Jul 2015 06:03:59 -0700 From: Patrik Jakobsson To: intel-gfx@lists.freedesktop.org Date: Fri, 31 Jul 2015 15:04:08 +0200 Message-Id: <1438347848-11293-1-git-send-email-patrik.jakobsson@linux.intel.com> X-Mailer: git-send-email 2.1.4 Subject: [Intel-gfx] [PATCH] drm/i915: Postpone plane readout until after encoder readout X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-5.6 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP When reading out hw state for planes we disable inactive planes which in turn triggers an update of the watermarks. The update depends on the crtc_clock being set which is done when reading out encoders. Thus postpone the plane readout until after encoder readout. This prevents a warning in skl_compute_linetime_wm() where pixel_rate becomes 0 when crtc_clock is 0. Signed-off-by: Patrik Jakobsson Reviewed-By: Maarten Lankhorst Tested-By: Intel Graphics QA PRTS (Patch Regression Test System Contact: shuang.he@intel.com) --- drivers/gpu/drm/i915/intel_display.c | 38 +++++++++++++++++++++--------------- 1 file changed, 22 insertions(+), 16 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 13a6608..73b2d4a 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -15205,27 +15205,25 @@ static bool primary_get_hw_state(struct intel_crtc *crtc) return !!(I915_READ(DSPCNTR(crtc->plane)) & DISPLAY_PLANE_ENABLE); } -static void readout_plane_state(struct intel_crtc *crtc, - struct intel_crtc_state *crtc_state) +static void intel_sanitize_plane(struct intel_plane *plane) { - struct intel_plane *p; struct intel_plane_state *plane_state; - bool active = crtc_state->base.active; + struct intel_crtc *crtc; - for_each_intel_plane(crtc->base.dev, p) { - if (crtc->pipe != p->pipe) - continue; + plane_state = to_intel_plane_state(plane->base.state); - plane_state = to_intel_plane_state(p->base.state); + if (!plane_state->base.crtc) + return; - if (p->base.type == DRM_PLANE_TYPE_PRIMARY) - plane_state->visible = primary_get_hw_state(crtc); - else { - if (active) - p->disable_plane(&p->base, &crtc->base); + crtc = to_intel_crtc(plane_state->base.crtc); - plane_state->visible = false; - } + if (plane->base.type == DRM_PLANE_TYPE_PRIMARY) { + plane_state->visible = primary_get_hw_state(crtc); + } else { + if (crtc->base.state->active) + plane->disable_plane(&plane->base, &crtc->base); + + plane_state->visible = false; } } @@ -15276,7 +15274,6 @@ static void intel_modeset_readout_hw_state(struct drm_device *dev) } crtc->base.hwmode = crtc->config->base.adjusted_mode; - readout_plane_state(crtc, to_intel_crtc_state(crtc->base.state)); DRM_DEBUG_KMS("[CRTC:%d] hw state readout: %s\n", crtc->base.base.id, @@ -15349,6 +15346,7 @@ intel_modeset_setup_hw_state(struct drm_device *dev) enum pipe pipe; struct intel_crtc *crtc; struct intel_encoder *encoder; + struct intel_plane *plane; int i; intel_modeset_readout_hw_state(dev); @@ -15360,6 +15358,14 @@ intel_modeset_setup_hw_state(struct drm_device *dev) for_each_pipe(dev_priv, pipe) { crtc = to_intel_crtc(dev_priv->pipe_to_crtc_mapping[pipe]); + + for_each_intel_plane(crtc->base.dev, plane) { + if (crtc->pipe != plane->pipe) + continue; + + intel_sanitize_plane(plane); + } + intel_sanitize_crtc(crtc); intel_dump_pipe_config(crtc, crtc->config, "[setup_hw_state]");