Message ID | 1438356525-26820-1-git-send-email-arun.siluvery@linux.intel.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
On Fri, Jul 31, 2015 at 04:28:45PM +0100, Arun Siluvery wrote: > Atleast one component of one valid vertex element must be enabled. > > Cc: Ben Widawsky <benjamin.widawsky@intel.com> > Cc: Chris Wilson <chris@chris-wilson.co.uk> > Signed-off-by: Arun Siluvery <arun.siluvery@linux.intel.com> > --- > drivers/gpu/drm/i915/intel_renderstate_gen9.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/intel_renderstate_gen9.c b/drivers/gpu/drm/i915/intel_renderstate_gen9.c > index 16a7ec2..fa86431 100644 > --- a/drivers/gpu/drm/i915/intel_renderstate_gen9.c > +++ b/drivers/gpu/drm/i915/intel_renderstate_gen9.c > @@ -873,7 +873,7 @@ static const u32 gen9_null_state_batch[] = { > 0x00000000, > 0x00000000, > 0x78550003, > - 0x00000000, > + 0x00000001, > 0x00000000, > 0x00000000, > 0x00000000, Same as previous comment in patch 1, but silly programming is better than definitely incorrect programming. With the comments from 1 addressed: Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
Arun Siluvery <arun.siluvery@linux.intel.com> writes: > Atleast one component of one valid vertex element must be enabled. > > Cc: Ben Widawsky <benjamin.widawsky@intel.com> > Cc: Chris Wilson <chris@chris-wilson.co.uk> > Signed-off-by: Arun Siluvery <arun.siluvery@linux.intel.com> > --- Please resend the newly generated one when the IGT parts are merged. That way we get the igt version info in the comment to match. -Mika > drivers/gpu/drm/i915/intel_renderstate_gen9.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/intel_renderstate_gen9.c b/drivers/gpu/drm/i915/intel_renderstate_gen9.c > index 16a7ec2..fa86431 100644 > --- a/drivers/gpu/drm/i915/intel_renderstate_gen9.c > +++ b/drivers/gpu/drm/i915/intel_renderstate_gen9.c > @@ -873,7 +873,7 @@ static const u32 gen9_null_state_batch[] = { > 0x00000000, > 0x00000000, > 0x78550003, > - 0x00000000, > + 0x00000001, > 0x00000000, > 0x00000000, > 0x00000000, > -- > 1.9.1 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx
Tested-By: Intel Graphics QA PRTS (Patch Regression Test System Contact: shuang.he@intel.com)
Task id: 6912
-------------------------------------Summary-------------------------------------
Platform Delta drm-intel-nightly Series Applied
ILK -1 302/302 301/302
SNB 315/315 315/315
IVB 336/336 336/336
BYT -2 283/283 281/283
HSW 378/378 378/378
-------------------------------------Detailed-------------------------------------
Platform Test drm-intel-nightly Series Applied
*ILK igt@kms_flip@flip-vs-dpms-interruptible PASS(1) DMESG_WARN(1)
*BYT igt@gem_partial_pwrite_pread@reads-uncached PASS(1) FAIL(1)
*BYT igt@gem_persistent_relocs@interruptible PASS(1) FAIL(1)
Note: You need to pay more attention to line start with '*'
diff --git a/drivers/gpu/drm/i915/intel_renderstate_gen9.c b/drivers/gpu/drm/i915/intel_renderstate_gen9.c index 16a7ec2..fa86431 100644 --- a/drivers/gpu/drm/i915/intel_renderstate_gen9.c +++ b/drivers/gpu/drm/i915/intel_renderstate_gen9.c @@ -873,7 +873,7 @@ static const u32 gen9_null_state_batch[] = { 0x00000000, 0x00000000, 0x78550003, - 0x00000000, + 0x00000001, 0x00000000, 0x00000000, 0x00000000,
Atleast one component of one valid vertex element must be enabled. Cc: Ben Widawsky <benjamin.widawsky@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Arun Siluvery <arun.siluvery@linux.intel.com> --- drivers/gpu/drm/i915/intel_renderstate_gen9.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)