From patchwork Thu Aug 6 16:38:19 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Sharma, Shashank" X-Patchwork-Id: 6961171 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 356D5C05AC for ; Thu, 6 Aug 2015 16:31:10 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 52D86206F6 for ; Thu, 6 Aug 2015 16:31:09 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 69E8B20637 for ; Thu, 6 Aug 2015 16:31:08 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 9A5EF7A14D; Thu, 6 Aug 2015 09:31:07 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by gabe.freedesktop.org (Postfix) with ESMTP id D82EE7A14D; Thu, 6 Aug 2015 09:31:06 -0700 (PDT) Received: from orsmga002.jf.intel.com ([10.7.209.21]) by orsmga102.jf.intel.com with ESMTP; 06 Aug 2015 09:31:07 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.15,623,1432623600"; d="scan'208";a="779156577" Received: from shashanks-desktop.iind.intel.com ([10.223.26.81]) by orsmga002.jf.intel.com with ESMTP; 06 Aug 2015 09:31:01 -0700 From: Shashank Sharma To: dri-devel@lists.freedesktop.org, matthew.d.roper@intel.com, robert.bradford@intel.com, thierry.reding@gmail.com, gary.k.smith@intel.com, hverkuil@xs4all.nl, jim.bish@intel.com, intel-gfx@lists.freedesktop.org Date: Thu, 6 Aug 2015 22:08:19 +0530 Message-Id: <1438879107-22819-11-git-send-email-shashank.sharma@intel.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1438879107-22819-1-git-send-email-shashank.sharma@intel.com> References: <1438879107-22819-1-git-send-email-shashank.sharma@intel.com> Cc: annie.j.matheson@intel.com, vijay.a.purushothaman@intel.com, kausalmalladi@gmail.com, jesse.barnes@intel.com, daniel.vetter@intel.com, susanta.bhattacharjee@intel.com Subject: [Intel-gfx] [PATCH 10/18] drm/i915: Add pipe deGamma correction handlers X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-4.3 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Kausal Malladi This patch adds set_property and get_property handlers for deGamma color correction capability at Pipe level. Set function just attaches the deGamma correction blob to CRTC state, which will be later commited in the atomic commit path. Signed-off-by: Shashank Sharma Signed-off-by: Kausal Malladi --- drivers/gpu/drm/i915/intel_atomic.c | 7 +++++++ drivers/gpu/drm/i915/intel_color_manager.c | 19 +++++++++++++++++++ drivers/gpu/drm/i915/intel_drv.h | 3 +++ 3 files changed, 29 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_atomic.c b/drivers/gpu/drm/i915/intel_atomic.c index 9f55e6c..1d8cb09 100644 --- a/drivers/gpu/drm/i915/intel_atomic.c +++ b/drivers/gpu/drm/i915/intel_atomic.c @@ -331,6 +331,10 @@ int intel_crtc_atomic_set_property(struct drm_crtc *crtc, return intel_color_manager_set_pipe_gamma(dev, state, &crtc->base, val); + if (property == config->cm_palette_before_ctm_property) + return intel_color_manager_set_pipe_degamma(dev, state, + &crtc->base, val); + DRM_DEBUG_KMS("Unknown crtc property '%s'\n", property->name); return -EINVAL; } @@ -346,6 +350,9 @@ int intel_crtc_atomic_get_property(struct drm_crtc *crtc, if (property == config->cm_palette_after_ctm_property) *val = (state->palette_after_ctm_blob) ? state->palette_after_ctm_blob->base.id : 0; + if (property == config->cm_palette_before_ctm_property) + *val = (state->palette_before_ctm_blob) ? + state->palette_before_ctm_blob->base.id : 0; return 0; } diff --git a/drivers/gpu/drm/i915/intel_color_manager.c b/drivers/gpu/drm/i915/intel_color_manager.c index f8c8d26..5fc8e41 100644 --- a/drivers/gpu/drm/i915/intel_color_manager.c +++ b/drivers/gpu/drm/i915/intel_color_manager.c @@ -170,6 +170,25 @@ void intel_color_manager_crtc_commit(struct drm_device *dev, } } +int intel_color_manager_set_pipe_degamma(struct drm_device *dev, + struct drm_crtc_state *crtc_state, + struct drm_mode_object *obj, uint32_t blob_id) +{ + struct drm_property_blob *blob; + + blob = drm_property_lookup_blob(dev, blob_id); + if (!blob) { + DRM_ERROR("Invalid Blob ID\n"); + return -EINVAL; + } + + if (crtc_state->palette_before_ctm_blob) + drm_property_unreference_blob(crtc_state->palette_before_ctm_blob); + + crtc_state->palette_before_ctm_blob = blob; + return 0; +} + int intel_color_manager_set_pipe_gamma(struct drm_device *dev, struct drm_crtc_state *crtc_state, struct drm_mode_object *obj, uint32_t blob_id) diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h index de3e6e7..d3b42ec 100644 --- a/drivers/gpu/drm/i915/intel_drv.h +++ b/drivers/gpu/drm/i915/intel_drv.h @@ -1444,6 +1444,9 @@ void intel_attach_color_properties_to_crtc(struct drm_device *dev, int intel_color_manager_set_pipe_gamma(struct drm_device *dev, struct drm_crtc_state *crtc_state, struct drm_mode_object *obj, uint32_t blob_id); +int intel_color_manager_set_pipe_degamma(struct drm_device *dev, + struct drm_crtc_state *crtc_state, + struct drm_mode_object *obj, uint32_t blob_id); void intel_color_manager_crtc_commit(struct drm_device *dev, struct drm_crtc_state *crtc_state);