From patchwork Thu Aug 6 16:38:13 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Sharma, Shashank" X-Patchwork-Id: 6961051 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id AE90DC05AC for ; Thu, 6 Aug 2015 16:30:37 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id E3CF7206F1 for ; Thu, 6 Aug 2015 16:30:36 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 016CE20637 for ; Thu, 6 Aug 2015 16:30:36 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 79C546E86E; Thu, 6 Aug 2015 09:30:35 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by gabe.freedesktop.org (Postfix) with ESMTP id F3EC76E872; Thu, 6 Aug 2015 09:30:34 -0700 (PDT) Received: from orsmga002.jf.intel.com ([10.7.209.21]) by fmsmga102.fm.intel.com with ESMTP; 06 Aug 2015 09:30:35 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.15,623,1432623600"; d="scan'208";a="779156170" Received: from shashanks-desktop.iind.intel.com ([10.223.26.81]) by orsmga002.jf.intel.com with ESMTP; 06 Aug 2015 09:30:28 -0700 From: Shashank Sharma To: dri-devel@lists.freedesktop.org, matthew.d.roper@intel.com, robert.bradford@intel.com, thierry.reding@gmail.com, gary.k.smith@intel.com, hverkuil@xs4all.nl, jim.bish@intel.com, intel-gfx@lists.freedesktop.org Date: Thu, 6 Aug 2015 22:08:13 +0530 Message-Id: <1438879107-22819-5-git-send-email-shashank.sharma@intel.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1438879107-22819-1-git-send-email-shashank.sharma@intel.com> References: <1438879107-22819-1-git-send-email-shashank.sharma@intel.com> Cc: annie.j.matheson@intel.com, vijay.a.purushothaman@intel.com, kausalmalladi@gmail.com, jesse.barnes@intel.com, daniel.vetter@intel.com, susanta.bhattacharjee@intel.com Subject: [Intel-gfx] [PATCH 04/18] drm: Add structure for querying palette color capabilities X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-4.3 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Kausal Malladi The DRM color management framework is targeting various hardware platforms and drivers. Different platforms can have different color correction and enhancement capabilities. A commom user space application can query these capabilities using the DRM property interface. Each driver can fill this property with its platform's palette color capabilities. This patch adds new structure in DRM layer for querying palette color capabilities. This structure will be used by all user space agents to configure appropriate color configurations. Signed-off-by: Shashank Sharma Signed-off-by: Kausal Malladi --- include/uapi/drm/drm.h | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/include/uapi/drm/drm.h b/include/uapi/drm/drm.h index 3801584..e3c642f 100644 --- a/include/uapi/drm/drm.h +++ b/include/uapi/drm/drm.h @@ -829,6 +829,17 @@ struct drm_event_vblank { __u32 reserved; }; +struct drm_palette_caps { + /* Structure version. Should be 1 currently */ + __u32 version; + /* For padding and future use */ + __u32 reserved; + /* This may be 0 if not supported. e.g. plane palette or VLV pipe */ + __u32 num_samples_before_ctm; + /* This will be non-zero for pipe. May be zero for planes on some HW */ + __u32 num_samples_after_ctm; +}; + /* typedef area */ #ifndef __KERNEL__ typedef struct drm_clip_rect drm_clip_rect_t;